SM320F2812-HT Datasheet, PDF (41/155 Pages) Texas Instruments – Digital Signal Processor

SM320F2812-HT
www.ti.com
SGUS062A – JUNE 2009 – REVISED APRIL 2010
The operation and timing of the external interface, can be controlled by the registers listed in Table 3-8.
Table 3-8. XINTF Configuration and Control Register Mappings
NAME
XTIMING0
XTIMING1
XTIMING2
XTIMING6
XTIMING7
XINTCNF2
XBANK
XREVISION
ADDRESS
0x00 0B20
0x00 0B22
0x00 0B24
0x00 0B2C
0x00 0B2E
0x00 0B34
0x00 0B38
0x00 0B3A
SIZE (×16)
2
2
2
2
2
2
1
1
DESCRIPTION
XINTF Timing Register, Zone 0 can access as two 16-bit registers or one 32-bit
register
XINTF Timing Register, Zone 1 can access as two 16-bit registers or one 32-bit
register
XINTF Timing Register, Zone 2 can access as two 16-bit registers or one 32-bit
register
XINTF Timing Register, Zone 6 can access as two 16-bit registers or one 32-bit
register
XINTF Timing Register, Zone 7 can access as two 16-bit registers or one 32-bit
register
XINTF Configuration Register can access as two 16-bit registers or one 32-bit
register
XINTF Bank Control Register
XINTF Revision Register
3.5.1 Timing Registers
XINTF signal timing can be tuned to match specific external device requirements such as setup and hold
times to strobe signals for contention avoidance and maximizing bus efficiency. The timing parameters
can be configured individually for each zone. This allows the programmer to maximize the efficiency of the
bus, based on the type of memory or peripheral that the user needs to access. All XINTF timing values
are with respect to XTIMCLK, which is equal to or one-half of the SYSCLKOUT rate, as shown in Figure
6-27.
For detailed information on the XINTF timing and configuration register bit fields, see the TMS320x281x
DSP External Interface (XINTF) Reference Guide (SPRU067).
3.5.2 XREVISION Register
The XREVISION register contains a unique number to identify the particular version of XINTF used in the
product. For the F2812, this register is configured as described in Table 3-9.
Table 3-9. XREVISION Register Bit Definitions
BIT(S)
15-0
NAME
REVISION
TYPE
R
RESET
0x0004
DESCRIPTION
Current XINTF Revision. For internal use/reference. Test purposes only.
Subject to change.
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