SM320F2812-HT Datasheet, PDF (62/155 Pages) Texas Instruments – Digital Signal Processor

SM320F2812-HT
SGUS062A – JUNE 2009 – REVISED APRIL 2010
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Figure 4-5 shows the ADC pin-biasing for internal reference and Figure 4-6 shows the ADC pin-biasing for
external reference.
ADC 16-Channel Analog Inputs ^ADCINA[7:0]
ADCINB[7:0]
ADCLO
Test Pin ADCBGREFIN^†
ADC External Current Bias Resistor
ADC Reference Positive Output
ADC Reference Medium Output
ADCRESEXT
ADCREFP
ADCREFM
Analog input 0−3 V with respect to ADCLO
Connect to Analog Ground
24.9 kW/20 kW (See Note C)
10 mF^‡
10 mF^‡
ADCREFP and ADCREFM should not
be loaded by external circuitry
ADC Analog Power
V_DDA1
V_DDA2
V_SSA1
V_SSA2
ADC Reference Power
AVDDREFBG
AVSSREFBG
Analog 3.3 V
Analog 3.3 V
Analog 3.3 V
ADC Analog I/O Power
ADC Digital Power
V_DDAIO
V_SSAIO
V_DD1
V_SS1
Analog 3.3 V
Analog Ground
1.8 V can use the same 1.8 V (or 1.9 V) supply as the
Digital Ground _{digital core but separate the two with a ferrite}
bead or a filter
† _{Provide access to this pin in PCB layouts. Intended for test purposes only.}
‡ _{TAIYO YUDEN EMK325F106ZH, EMK325BJ106MD, or equivalent}
NOTES: A. External decoupling capacitors are recommended on all power pins.
B. Analog inputs must be driven from an operational amplifier that does not degrade the ADC performance.
C. Use 24.9 kΩ for ADC clock range 1 − 18.75 MHz; use 20 kΩ for ADC clock range 18.75 − 25 MHz.
Figure 4-5. ADC Pin Connections With Internal Reference (See Notes A and B)
NOTE
The temperature rating of any recommended component must match the rating of the end
product.
62
Peripherals
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