SM320F2812-HT Datasheet, PDF (25/155 Pages) Texas Instruments – Digital Signal Processor

SM320F2812-HT
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GPIO
PERIPHERAL
SIGNAL
GPIOF6 CANTXA (O)
GPIOF7 CANRXA (I)
GPIOF8 MCLKXA (I/O)
GPIOF9 MCLKRA (I/O)
GPIOF10 MFSXA (I/O)
GPIOF11 MFSRA (I/O)
GPIOF12 MDXA (O)
GPIOF13 MDRA (I)
GPIOF14 XF_XPLLDIS (O)
SGUS062A – JUNE 2009 – REVISED APRIL 2010
Signal Descriptions (Continued) ⁽¹⁾ (continued)
PIN NO.
172-PIN
HFG
DIE PAD NO.
DIE PAD
X-CENTER
DIE PAD
Y-CENTER
GPIOF OR CAN SIGNALS
I/O/Z ⁽²⁾
85
99
5361.5
4758.0
I/O/Z
87
101
5192.7
5057.5
I/O/Z
GPIOF OR McBSP SIGNALS
27
34
3461.4
42.6
I/O/Z
24
31
3146.8
42.6
I/O/Z
25
32
3242.2
42.6
I/O/Z
28
35
3556.7
42.6
I/O/Z
21
28
2832.3
42.6
I/O/Z
19
26
2613.0
42.6
GPIOF OR XF CPU OUTPUT SIGNAL
I/O/Z
137
153
42.6
4153.3
I/O/Z
PU/PD⁽³⁾ DESCRIPTION
PU
GPIO or eCAN
transmit data
PU
GPIO or eCAN
receive data
PU
GPIO or transmit
clock
PU
GPIO or receive
clock
PU
GPIO or transmit
frame synch
PU
GPIO or receive
frame synch
–
GPIO or transmitted
serial data
PU
GPIO or received
serial data
This pin has three
functions:
1. XF –
General-purpose
output pin.
2. XPLLDIS – This
pin is sampled
during reset to check
if the PLL needs to
PU _{be disabled. The}
PLL will be disabled
if this pin is sensed
low. HALT and
STANDBY modes
cannot be used
when the PLL is
disabled.
3. GPIO – GPIO
function
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Introduction
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