SM320F2812-HT Datasheet, PDF (28/155 Pages) Texas Instruments – Digital Signal Processor

SM320F2812-HT
SGUS062A – JUNE 2009 – REVISED APRIL 2010
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3.1 Memory Map
Block
Start Address
ÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍ _{0x00 0000}
ÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍ _{0x00 0040}
ÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍ _{0x00 0400}
ÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍ _{0x00 0800}
ÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍ _{0x00 0D00}
ÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍ _{0x00 0E00}
ÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍ _{0x00 2000}
ÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍ _{0x00 6000}
ÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍ _{0x00 7000}
ÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍ 0x00 8000
ÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍ 0x00 9000
0x00 A000
On-Chip Memory
Data Space
Prog Space
M0 Vector − RAM (32 × 32)
(Enabled if VMAP = 0)
M0 SARAM (1K × 16)
M1 SARAM (1K × 16)
Peripheral Frame 0
(2K × 16)
PIE Vector - RAM
(256 × 16)
(Enabled if VMAP
= 1, ENPIE = 1)
Reserved
Reserved
Reserved
Peripheral Frame 1
(4K × 16, Protected)
Peripheral Frame 2
(4K × 16, Protected)
Reserved
L0 SARAM (4K × 16, Secure Block)
L1 SARAM (4K × 16, Secure Block)
ÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍ _Reserved
External Memory XINTF
Data Space
Prog Space
Reserved
XINTF Zone 0 (8K × 16, XZCS0AND1)
XINTF Zone 1 (8K × 16, XZCS0AND1) (Protected)
0x00 2000
0x00 4000
Reserved
XINTF Zone 2 (0.5M × 16, XZCS2)
XINTF Zone 6 (0.5M × 16, XZCS6AND7)
0x08 0000
0x10 0000
0x18 0000
ÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍ _{0x3D 7800}
ÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍ _{0x3D 7C00}
ÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍ 0x3D 8000
0x3F 7FF8
ÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍ _{0x3F 8000}
ÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍ _{0x3F A000}
ÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍ _{0x3F F000}
OTP (or ROM) (1K × 16, Secure Block)
Reserved (1K)
Flash (or ROM) (128K × 16, Secure Block)
128-Bit Password
H0 SARAM (8K × 16)
Reserved
Reserved
XINTF Zone 7 (16K × 16, XZCS6AND7)
0x3F C000
Boot ROM (4K × 16)
(Enabled if MP/MC = 1)
(Enabled if MP/MC = 0)
LEGEND:
0x3F FFC0
BROM Vector - ROM (32 × 32)
(Enabled if VMAP = 1, MP/MC = 0, ENPIE = 0)
XINTF Vector - RAM (32 × 32)
(Enabled if VMAP = 1, MP/MC = 1, ENPIE = 0)
Only one of these vector maps—M0 vector, PIE vector, BROM vector, XINTF vector—should be enabled at a time.
A. Memory blocks are not to scale.
B. Reserved locations are reserved for future expansion. Application should not access these areas.
C. Boot ROM and Zone 7 memory maps are active either in on-chip or XINTF zone depending on MP/MC, not in both.
D. Peripheral Frame 0, Peripheral Frame 1, and Peripheral Frame 2 memory maps are restricted to data memory only.
User program cannot access these memory maps in program space.
E. Protected means the order of Write followed by Read operations is preserved rather than the pipeline order.
F. Certain memory ranges are EALLOW protected against spurious writes after configuration.
G. Zones 0 and 1 and Zones 6 and 7 share the same chip select; hence, these memory blocks have mirrored locations.
Figure 3-2. F2812 Memory Map (See Notes A. Through G.)
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Functional Overview
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