English
Language : 

SM320F2812-HT Datasheet, PDF (88/155 Pages) Texas Instruments – Digital Signal Processor
SM320F2812-HT
SGUS062A – JUNE 2009 – REVISED APRIL 2010
www.ti.com
6.4 Current Consumption by Power-Supply Pins Over Recommended Operating
Conditions During Low-Power Modes at 150-MHz SYSCLKOUT
MODE
Operational
IDLE
STANDBY
HALT
TEST CONDITIONS
IDD
TYP MAX(2)
TA = –55°C to 125°C
IDDIO
IDD3VFL
TYP MAX(2) TYP MAX(2)
IDDA (1)
TYP MAX(2)
IDD
TYP MAX
TA = 220°C
IDDIO
IDD3VFL
TYP MAX TYP MAX
IDDA (1)
TYP MAX
All peripheral clocks
are enabled. All
PWM pins are
toggled at 100 kHz.
Data is continuously
transmitted out of the
SCIA, SCIB, and
195 mA 230 mA
CAN ports. The
hardware multiplier is
exercised.
Code is running out
of flash with 5
wait-states.
15 mA
30 mA
40 mA
45 mA
40 mA
50 mA 275 mA 330 mA 17 mA
30 mA
45 mA
50 mA
40 mA
52 mA
–Flash is powered
down
–XCLKOUT is turned
off
125 mA
150 mA
–All peripheral clocks
are on, except ADC
5 mA
10 mA
2 mA
4 mA
1 mA 35 mA 200 mA
10 mA
56 mA 100 mA 320 mA 450 mA
–Flash is powered
down
–Peripheral clocks
are turned off
–Pins without an
internal PU/PD are
tied high/low
5 mA 10 mA 5 mA 20 mA 2 mA
4 mA 1 mA 35 mA 27 mA 40 mA 160 mA 200 mA 56 mA 100 mA 320 mA 450 mA
–Flash is powered
down
–Peripheral clocks
are turned off
–Pins without an
internal PU/PD are
tied high/low
– Input clock is
disabled
70 mA
5 mA 20 mA 2 mA 4 mA 1mA 35 mA 9.8 mA
160 mA 200 mA 56 mA 100 mA 320 mA 450 mA
(1) IDDA includes current into VDDA1, VDDA2, VDD1, AVDDREFBG , and VDDAIO pins.
(2) MAX numbers are at 125°C, and max voltage (VDD = 2.0 V; VDDIO, VDD3VFL, VDDA = 3.6 V).
NOTE
HALT and STANDBY modes cannot be used when the PLL is disabled.
88
Electrical Specifications
Copyright © 2009–2010, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Link(s): SM320F2812-HT