M16C26A Datasheet, PDF (94/352 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/Tiny SERIES

M16C/26A Group (M16C/26A, M16C/26B, M16C/26T)
9. Interrupt
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9.7 NMI Interrupt
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An NMI interrupt request is generated when input on the NMI pin changes state from high to low, after the
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NMI interrupt was enabled by writing a “1” to PM24 bit in the PM2 register. The NMI interrupt is a non-
maskable interrupt, once it is enabled.
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The input level of this NMI interrupt input pin can be read by accessing the P8_5 bit in the P8 register.
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NMI is disabled by default after reset (the pin is a GPIO pin, P85) and can be enabled using PM24 bit in the
PM2 register. Once enabled, it can only be disabled by a reset signal.
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The NMI input has an effective digital debounce function for a noise rejection. Refer to 16.6 Digital
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Debounce Function for this detail. When using NMI interrupt to exit stop mode, set the NDDR register to
"FF16" before entering stop mode.
9.8 Key Input Interrupt
Of P104 to P107, a key input interrupt is generated when input on any of the P104 to P107 pins which has
had the PD10_4 to PD10_7 bits in the PD10 register set to “0” (= input) goes low. Key input interrupts can
be used as a key-on wakeup function, the function which gets the microcomputer out of wait or stop mode.
However, if you intend to use the key input interrupt, do not use P104 to P107 as analog input ports. Figure
9.8.1 shows the block diagram of the key input interrupt. Note, however, that while input on any pin which
has had the PD10_4 to PD10_7 bits set to “0” (= input mode) is pulled low, inputs on all other pins of the port
are not detected as interrupts.
Pull-up
transistor
KI3
Pull-up
transistor
KI2
Pull-up
transistor
KI1
Pull-up
transistor
KI0
PU25 bit in the
PD10 register
PD10_7 bit in the
PD10 register
PD10_7 bit in the PD10 register
PD10_6 bit in the
PD10 register
PD10_5 bit in the
PD10 register
PD10_4 bit in the
PD10 register
Figure 9.8.1. Key Input Interrupt
KUPIC register
Interrupt control circuit
Key input interrupt
request
Rev. 2.00 Feb.15, 2007 ^{page 77} of 329
REJ09B0202-0200