M16C26A Datasheet, PDF (52/352 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/Tiny SERIES

M16C/26A Group (M16C/26A, M16C/26B, M16C/26T)
6. Processor Mode
6. Processor Mode
The microcomputer supports single-chip mode only. Figures 6.1 and 6.2 show the associated registers.
Processor Mode Register 0 ⁽¹⁾
b7 b6 b5 b4 b3 b2 b1 b0
0000 0 00
Symbol
PM0
Address
000416
After Reset
0016
Bit Symbol
Bit Name
(b2-b0)
Reserved bit
PM03
Software reset bit
(b7-b4)
Reserved bit
Function
RW
Set to "0"
RW
The microcomputer is reset when
this bit is set to "1". When read, RW
its content is "0".
Set to "0"
RW
NOTES:
1. Rewrite the PM0 register after the PRC1 bit in the PRCR register is set to "1" (write enable).
Processor Mode Register 1 ⁽¹⁾
b7 b6 b5 b4 b3 b2 b1 b0
000 1 0
Symbol
PM1
Address
000516
After Reset
000010002
Bit Symbol
Bit Name
Function
RW
PM10
Flash data block access 0: Disabled
bit ⁽²⁾
1: Enabled ⁽³⁾
RW
(b1)
Reserved bit
Set to "0"
RW
PM12
Watchdog timer function 0 : Watchdog timer interrupt
select bit
1 : Watchdog timer reset ⁽⁴⁾
RW
(b3)
Reserved bit
Set to "1"
RW
(b6-b4)
Reserved bit
Set to "0"
RW
PM17
Wait bit ⁽⁵⁾
0 : No wait state
1 : Wait state (1 wait)
RW
NOTES:
1. Rewrite the PM1 register after the PRC1 bit in the PRCR register is set to "1" (write enable).
2. To access the two 2K-byte data spaces in data block A and data block B, set the PM10 bit to "1". The PM10
bit is not available in mask version.
3. When the FMR01 bit in the FMR0 register is set to "1" (enables CPU rewrite mode), the PM10 bit is
automatically set to "1".
4. Set the PM12 bit to "1" by program. (Writing "0" by program has no effect)
5. When the PM17 bit is set to "1" (wait state), one wait is inserted when accessing the internal RAM or the
internal ROM.
Figure 6.1 PM0 Register, PM1 Register
Rev. 2.00 Feb.15, 2007
REJ09B0202-0200
page 35of ₃₂₉