M16C26A Datasheet, PDF (190/352 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/Tiny SERIES

M16C/26A Group (M16C/26A, M16C/26B, M16C/26T)
13. Serial I/O
13.1.5 Special Mode 3 (IE Bus mode )(UART2)
In this mode, one bit of IE Bus is approximated with one byte of UART mode waveform.
Table 13.1.5.1 lists the registers used in IE Bus mode and the register values set. Figure 13.1.5.1 shows
the functions of bus collision detect function related bits.
If the TxD2 pin output level and RxD2 pin input level do not match, a UART2 bus collision detect interrupt
request is generated.
Table 13.1.5.1. Registers to Be Used and Settings in IE Bus Mode
Register
Bit
Function
U2TB
U2RB⁽¹⁾
0 to 8
0 to 8
Set transmission data
Reception data can be read
OER,FER,PER,SUM Error flag
U2BRG 0 to 7
Set a transfer rate
U2MR
SMD2 to SMD0 Set to ‘1102’
CKDIR
Select the internal clock or external clock
STPS
Set to “0”
PRY
Invalid because PRYE=0
PRYE
Set to “0”
IOPOL
Select the TxD/RxD input/output polarity
U2C0
CLK1, CLK0
Select the count source for the U2BRG register
CRS
Invalid because CRD=1
TXEPT
Transmit register empty flag
CRD
Set to “1”
NCH
Select TxD2 pin output mode
CKPOL
Set to “0”
UFORM
Set to “0”
U2C1
TE
Set this bit to “1” to enable transmission
TI
Transmit buffer empty flag
RE
Set this bit to “1” to enable reception
RI
Reception complete flag
U2IRS
Select the source of UART2 transmit interrupt
U2RRM,
Set to “0”
U2LCH, U2ERE
U2SMR 0 to 3, 7
Set to “0”
ABSCS
Select the sampling timing at which to detect a bus collision
ACSE
Set this bit to “1” to use the auto clear function of transmit enable bit
SSS
Select the transmit start condition
U2SMR2 0 to 7
Set to “0”
U2SMR3 0 to 7
Set to “0”
U2SMR4 0 to 7
Set to “0”
NOTE:
1. Not all bits in the registers are described above. Set those bits to “0” when writing to the registers in
IEBus mode.
Rev. 2.00 Feb.15, 2007 ^{page 173} of 329
REJ09B0202-0200