M16C26A Datasheet, PDF (299/352 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/Tiny SERIES

M16C/26A Group (M16C/26A, M16C/26B, M16C/26T)
18. Electrical Characteristics (M16C/26T)
Table 18.40. A/D Conversion Characteristics ⁽¹⁾
Symbol
Parameter
-
Resolution
Measurement Condition
VREF = VCC
Standard
Unit
Min. Typ. Max.
10 Bits
VREF = VCC = 5 V
INL
Integral Nonlinearity
Error
10 bit
VREF = VCC = 3.3 V
8 bit VREF = VCC = 3.3 V, 5 V
±3 LSB
±5 LSB
±2 LSB
-
Absolute Accuracy
10 bit
VREF = VCC = 5 V
VREF = VCC = 3.3 V
±3 LSB
±5 LSB
8 bit VREF = VCC = 3.3 V, 5 V
±2 LSB
DNL
Differential Nonlinearity Error
±1 LSB
-
Offset Error
±3 LSB
-
Gain Error
±3 LSB
RLADDER
Resistor Ladder
VREF = VCC
10
40 kΩ
tCONV
10-bit Conversion Time
Sample & Hold Function Available
VREF = VCC=5 V, φAD = 10 MHz
3.3
µs
tCONV
8-bit Conversion Time
Sample & Hold Function Available
VREF = VCC = 5 V, φAD = 10 MHz
2.8
µs
VREF
Reference Voltage
2.0
VCC V
VIA
Analog Input Voltage
0
VREF V
NOTES:
1. Referenced to VCC= AVCC= VREF= 3.3 to 5.5 V, VSS = AVSS= 0 V at Topr = -40 to 85° C unless otherwise
specified.
2. Keep φAD frequency at 10 MHz or less. Additionally, divide the fAD if VCC is less than 4.2 V, and make φAD
frequency equal to or lower than fAD/2.
3. When sample & hold function is disabled, keep φAD frequency at 250 kHz or more in addition to the limitation in Note 2.
When sample & hold function is enabled, keep φAD frequency at 1 MHz or more in addition to the limitation in Note 2.
4. When sample & hold function is enabled, sampling time is 3/ φAD frequency.
When sample & hold function is disabled, sampling time is 2/ φAD frequency.
Rev. 2.00 Feb.15, 2007 ^{page 282} of 329
REJ09B0202-0200