M16C26A Datasheet, PDF (131/352 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/Tiny SERIES

M16C/26A Group (M16C/26A, M16C/26B, M16C/26T)
12. Timer
Count source
“H”
Measurement pulse
“L”
Reload register counter
transfer timing
Timing at which counter
reaches “000016”
“1”
TBiS bit
“0”
Transfer
(indeterminate value)
Transfer
(measured value)
(1)
(1)
(2)
IR bit in the TBiIC
“1”
register
“0”
MR3 bit in theTBiMR ^{“1”}
register
“0”
Set to “0” upon accepting an interrupt request or by writing in
program
The TB0S to TB2S bits are assigned to the bit 5 to bit 7 in the TABSR register.
i = 0 to 2
NOTES:
1. Counter is initialized at completion of measurement.
2. Timer has overflowed.
3. This timing diagram is for the case where the MR1 to MR0 bits in the TBiMR register are “002” (measure the interval
from falling edge to falling edge of the measurement pulse).
Figure 12.2.3.2 Operation timing when measuring a pulse period
Count source
“H”
Measurement pulse
“L”
Reload register counter
transfer timing
Timing at which counter
reaches “000016”
Transfer
(indeterminate
value)
Transfer
(measured value)
Transfer
(measured
value)
Transfer
(measured value)
(1)
(1)
(1)
(1)
(2)
TBiS bit
“1”
“0”
IR bit in the TBiIC
“1”
register
“0”
“1”
MR3 bit in the TBiMR _{“0”}
register
Set to “0” upon accepting an interrupt request or by
writing in program
i = 0 to 2
The TB0S to TB2S bits are assigned to the bit 5 to bit 7 in the TABSR register.
NOTES:
1. Counter is initialized at completion of measurement.
2. Timer has overflowed.
3. This timing diagram is for the case where the MR1 to MR0 bits in the TBiMR register are “102” (measure the
interval from a falling edge to the next rising edge and the interval from a rising edge to the next falling edge of
the measurement pulse).
Figure 12.2.3.3 Operation timing when measuring a pulse width
Rev. 2.00 Feb.15, 2007 ^{page 114} of 329
REJ09B0202-0200