M16C26A Datasheet, PDF (256/352 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/Tiny SERIES

M16C/26A Group (M16C/26A, M16C/26B, M16C/26T)
17. Flash Memory Version
17.5 Register Description
Figure 17.5.1 shows the flash memory control register 0 and flash memory control register 1. Figure 17.5.2
shows the flash memory control register 4.
17.5.1 Flash memory control register 0 (FMR0)
•FMR 00 Bit
This bit indicates the operation status of the flash memory. The bit is “0” during programming, erasing,
or erase-suspend mode; otherwise, the bit is “1”.
•FMR01 Bit
The microcomputer enables to acknowledge commands by setting the FMR01 bit to “1” (CPU rewrite
mode). To set this bit to “1”, it is necessary to set to “1” after first setting to “0”. Set this bit to “0” by only
writing “0”.
•FMR02 Bit
The combined setting of the FMR02 bit and the FMR16 bit enable to program and erase in the user
ROM area. See Table 17.5.2.1 for setting details. To set this bit to “1”, it is necessary to set to “1” after
first setting to “0”. Set this bit to “0” by only writing “0”. This bit is enabled only when the FMR01 bit is
“1” (CPU rewrite mode enable).
•FMSTP Bit
This bit resets the flash memory control circuits and minimizes power consumption in the flash
memory. Access to the flash memory is disabled when the FMSTP bit is set to “1”. Set the FMSTP bit
by a program in a space other than the flash memory.
Set the FMSTP bit to “1” if one of the following occurs:
•A flash memory access error occurs during erasing or programming in EW0 mode (FMR00 bit does
not switch back to “1” (ready)).
•Low-power consumption mode or on-chip oscillator low-power consumption mode is entered.
Figure 17.5.1.3 shows a flow chart illustrating how to start and stop the flash memory before and after
entering low power mode. Follow the procedure on this flow chart.
To enter stop or wait mode when CPU rewrite mode is disabled, do not set the FMR0 register. The
flash memory is automatically turned off when entering and turned back on when exiting.
•FMR06 Bit
This is a read-only bit indicating an auto-program operation status. This bit is set to “1” when a pro-
gram error occurs; otherwise, it is set to “0”. For details, refer to 17.8.4 Full Status Check.
•FMR07 Bit
This is a read-only bit indicating an auto-erase operation status. The bit is set to “1” when an erase
error occurs; otherwise, it is set to “0”. For details, refer to 17.8.4 Full Status Check.
Figure 17.5.1.1 shows a EW0 mode set/reset flowchart, figure 17.5.1.2 shows a EW1 mode set/reset
flowchart.
Rev. 2.00 Feb.15, 2007 ^{page 239} of 329
REJ09B0202-0200