M16C26A Datasheet, PDF (200/352 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/Tiny SERIES

M16C/26A Group (M16C/26A, M16C/26B, M16C/26T)
14. A/D Converter
A/D trigger control register ^(1,2)
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
ADTRGCON
Address
03D216
After reset
0016
Bit symbol
SSE
Bit name
A/D Operation Mode
Select Bit 2
Function
RW
0 : Other than simultaneous sample sweep
RW
mode or delayed trigger mode 0,1
1 : Simultaneous sample sweep mode or
delayed trigger mode 0,1
DTE
A/D Operation Mode
Select Bit 3
0 : Other than delayed trigger mode 0,1
1 : Delayed trigger mode 0,1
RW
HPTRG0 ^{AN0 Trigger Select Bit}
Function varies with each operation mode
RW
HPTRG1 ^{AN1 Trigger Select Bit}
Function varies with each operation mode
RW
(b7-b4)
Nothing is assigned. When write, set to “0”.
When read, its content is “0”.
NOTES:
1. If the ADTRGCON register is rewritten during A/D conversion, the conversion result will be indeterminate.
2. Set “0016” in this register in one-shot mode, repeat mode, single sweep mode, repeat sweep mode 0 and repeat sweep
mode 1.
Figure 14.3 ADTRGCON Register
Table 14.2 A/D Conversion Frequency Select
CKS2
0
0
0
0
1
1
1
1
CKS1
0
0
1
1
0
0
1
1
CKS0
0
1
0
1
0
1
0
1
ØAD
Divided-by-4 of fAD
Divided-by-2 of fAD
fAD
Divided-by-12 of fAD
Divided-by-6 of fAD
Divided-by-3 of fAD
NOTE:
1. Set the φAD frequency to 10 MHz or less (12 MHz or less in M16C/26B). The φAD is selected with
combinations of the CKS0 bit in the ADCON0 register, CKS1 bit in the ADCON1 register, and the
CKS2 bit in the ADCON2 register.
Rev. 2.00 Feb.15, 2007 ^{page 183} of 329
REJ09B0202-0200