M16C26A Datasheet, PDF (212/352 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/Tiny SERIES

M16C/26A Group (M16C/26A, M16C/26B, M16C/26T)
14. A/D Converter
A/D control register 0 ⁽¹⁾
b7 b6 b5 b4 b3 b2 b1 b0
11
Symbol
ADCON0
Address
03D616
Bit symbol
Bit name
CH0
Analog Input Pin
Select Bit
CH1
After reset
00000XXX 2
Function
Invalid in repeat sweep mode 1
CH2
MD0
MD1
TRG
A/D Operation Mode
Select Bit 0
Trigger Select Bit
b4 b3
1 1 : Repeat sweep mode 0 or
Repeat sweep mode 1
0 : Software trigger
1 : Hardware trigger (AD TRG trigger)
ADST
CKS0
A/D Conversion Start
Flag
Frequency Select Bit 0
0 : A/D conversion disabled
1 : A/D conversion started
Refer to Table 14.2 A/D Conversion
Frequency Select
NOTE:
1. If the ADCON0 register is rewritten during A/D conversion, the conversion result will be indeterminate.
RW
RW
RW
RW
RW
RW
RW
RW
RW
A/D control register 1 ⁽¹⁾
b7 b6 b5 b4 b3 b2 b1 b0
1
1
Symbol
ADCON1
Address
03D716
After reset
00 16
Bit symbol
Bit name
Function
RW
A/D Sweep Pin
When selecting repeat sweep mode 1
RW
SCAN0 _{Select Bit} (2)
b1 b0
0 0 : AN0 (1 pin)
0 1 : AN0 to AN1 (2 pins)
SCAN1
1 0 : AN0 to AN2 (3 pins)
1 1 : AN0 to AN3 (4 pins)
RW
MD2
A/D Operation Mode
Select Bit 1
1 : Repeat sweep mode 1
RW
BITS
8/10-Bit Mode Select Bit 0 : 8-bit mode
1 : 10-bit mode
RW
CKS1
Frequency Select Bit 1 ^{Refer to Table 14.2 A/D Conversion}
Frequency Select
RW
VCUT
VREF Connect Bit ⁽³⁾
1 : VREF connected
RW
(b7-b6)
Nothing is assigned. When write, set to “0”.
When read, its content is “0”.
NOTES:
1. If the ADCON1 register is rewritten during A/D conversion, the conversion result will be indeterminate.
2. AN30 to AN32 can be used in the same way as AN0 to AN7. Use the ADGSEL1 to ADGSEL0 bits in the ADCON2
register to select the desired pin.
3. If the VCUT bit is reset from “0” (VREF unconnected) to “1” (VREF connected), wait for 1 µs or more before starting
A/D conversion.
A/D control register 2 ⁽¹⁾
b7 b6 b5 b4 b3 b2 b1 b0
00
Symbol
ADCON2
Address
03D4h
After reset
00h
Bit symbol
Bit name
SMP
A/D Conversion Method
Select Bit
ADGSEL0 A/D Input Group
Select Bit
ADGSEL1
(b3)
CKS2
Reserved Bit
Frequency Select Bit 2
Function
0 : Without sample and hold
1 : With sample and hold
b2 b1
0 0 : Select port P10 group (AN i)
0 1 : Select port P9 group (AN 3i)
1 0 : Do not set
1 1 : Do not set
Set to “0”
Refer to Table 14.2 A/D Conversion
Frequency Select
RW
RW
RW
RW
RW
RW
TRG1
Trigger Select Bit 1
Set to "0" in repeat sweep mode 1
RW
(b7-b6)
Nothing is assigned. When write, set to “0”.
When read, its content is “0”.
NOTE:
1. If the ADCON2 register is rewritten during A/D conversion, the conversion result will be indeterminate.
Figure 14.1.5.2 ADCON0 to ADCON2 Registers in Repeat Sweep Mode 1
Rev. 2.00 Feb.15, 2007 ^{page 195} of 329
REJ09B0202-0200