English
Language : 

M16C26A Datasheet, PDF (348/352 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/Tiny SERIES
◁
REVISION HISTORY M16C/26A Group (M16C/26A, M16C/26B, M16C/26T) Hardware Manual
Rev. Date
Page
77
78
-
80
81
108
115
121
123
131
133
136
138
139
142
145
150
154
158
168
175
177
180
183
205
212
Description
Summary
______
•9.7 NMI Interrupt Description partially added
•Table 9.9.1 Value of the PC that is saved to the stack area when an address
match interrupt request is accepted modified, note 1 added
Watchdog Timer
•Section of Cold Start/Warm Start deleted
•Description partially added
•Figure 10.1 Watchdog Timer Block Diagram partially modified
•Figure 10.2 WDC Register and WDTS Register notes deleted, WDC5 bit de-
leted
•10.1 Count source protective mode description partially added
Timer
•Description about A/D trigger mode modified
•Figure 12.2.1 Timber B Block Diagram A/D trigger mode added
•12.2.4 A/D Trigger Mode Description modified
•Figure 12.3.4 IDB0 Register, IDB1 Register, DTT Register, and ICTB2 Regis-
ter modified
•Figure 12.3.6 TB2SC Register modified, note 4 added
•Figure 12.3.2.2 TPRC Register bit map modified
Serial I/O
•Figure 13.1.1 Block Diagram of UARTi (i = 0 to 2) PLL clock added
•Figure 13.1.4 U0TB to U2TB Registers, U0RB to U2RB Registers, U0BRG to
U2BRG Registers modified, note 3 for UiBRG added
•Figure 13.1.6 U0C0 to U2C0 Registers Note 2 modified, note 7 added
•Figure 13.1.7 PACR Register note 1 modified
•Table 13.1.1.1 Clock Synchronous Serial I/O Mode Specification note 2 modi-
fied
•Figure 13.1.1.1 Typical Transmit/Receive Timings in Clock Synchronous
Serial I/O Mode partially modified
•Table 13.1.2.1 UART Mode Specifications Note 1 modified
•Figure 13.1.2.2 Receive Operation Figure modified
•Table 13.1.3.1 I2C bus Mode Specifications note 2 modified
•Table 13.1.4.1 Special Mode 2 Specifications note 2 modified
•Table 13.1.6.1 SIM Mode Specifications note 1 modified
•Figure 13.1.6.1 Transmit and Receive Timing in SIM Mode timing modified
A/D Converter
•Table 14.1 A/D Converter Performance note 2 partially added
•Table 14.2 A/D Conversion Frequency Select note 1 partially added
•Table 14.1.8.1 Delayed Trigger Mode 1 Specifications note 1 modified
•Figure 14.5.1 Analog Input Pin and External Sensor Equivalent Circuit note
C-2
 ▷