M16C26A Datasheet, PDF (130/352 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/Tiny SERIES

M16C/26A Group (M16C/26A, M16C/26B, M16C/26T)
12. Timer
12.2.3 Pulse Period and Pulse Width Measurement Mode
In pulse period and pulse width measurement mode, the timer measures pulse period or pulse width of an
external signal (see Table 12.2.3.1). Figure 12.2.3.1 shows TBiMR register in pulse period and pulse
width measurement mode. Figure 12.2.3.2 shows the operation timing when measuring a pulse period.
Figure 12.2.3.3 shows the operation timing when measuring a pulse width.
Table 12.2.3.1 Specifications in Pulse Period and Pulse Width Measurement Mode
Item
Specification
Count source
f1, f2, f8, f32, fC32
Count operation
• Up-count
• Counter value is transferred to reload register at an effective edge of mea-
Count start condition
surement pulse. The counter value is set to “000016” to continue counting.
Set TBiS (i=0 to 2) bit⁽³⁾ to “1” (= start counting)
Count stop condition
Set TBiS bit to “0” (= stop counting)
Interrupt request generation timing • When an effective edge of measurement pulse is input⁽¹⁾
• Timer overflow. When an overflow occurs, MR3 bit in the TBiMR register is
set to “1” (overflowed) simultaneously. MR3 bit is cleared to “0” (no over-
flow) by writing to TBiMR register at the next count timing or later after MR3
bit was set to “1”. At this time, make sure TBiS bit is set to “1” (start count-
ing).
TBiIN pin function
Read from timer
Measurement pulse input
Contents of the reload register (measurement result) can be read by reading TBi register⁽²⁾
Write to timer
Value written to TBi register is written to neither reload register nor counter
NOTES:
1. Interrupt request is not generated when the first effective edge is input after the timer started counting.
2. Value read from TBi register is indeterminate until the second valid edge is input after the timer starts counting.
3. The TB0S to TB2S bits are assigned to the bit 5 to bit 7 in the TABSR register.
Timer Bi mode register (i=0 to 2)
b7 b6 b5 b4 b3 b2 b1 b0
10
Symbol
TB0MR to TB2MR
Address
039B16 to 039D16
After reset
00XX00002
Bit symbol
Bit name
Function
RW
TMOD0 Operation mode
b1 b0
1 0 : Pulse period / pulse width
RW
select bit
TMOD1
measurement mode
RW
MR0
Measurement mode
select bit
b3 b2
0 0 : Pulse period measurement
(Measurement between a falling edge and the
next falling edge of measured pulse)
RW
0 1 : Pulse period measurement
(Measurement between a rising edge and the next
MR1
rising edge of measured pulse)
1 0 : Pulse width measurement
(Measurement between a falling edge and the
next rising edge of measured pulse and between
RW
a rising edge and the next falling edge)
1 1 : Must not be set.
MR2
TB0MR register
RW
Must be set to “0” in pulse period and pulse width measurement mode
TB1MR, TB2MR registers
Nothing is assigned. When write, set to “0”. When read, its content turns out to be
indeterminate.
MR3
Timer Bi overflow
flag ⁽¹⁾
0 : Timer did not overflow
1 : Timer has overflowed
RO
TCK0
Count source
select bit
b7 b6
0 0 : f1 or f2
0 1 : f8
RW
TCK1
1 0 : f32
1 1 : fC32
RW
NOTE:
1. This flag is indeterminate after reset. When the TBiS bit is set to "1" (start counting), the MR3 bit is cleared to “0” (no overflow) by writing to the
TBiMR register at the next count timing or later after the MR3 bit was set to “1” (overflowed). The MR3 bit cannot be set to “1” in a program. The
TB0S to TB2S bits are assigned to the bit 5 to bit 7 in the TABSR register.
Figure 12.2.3.1 TBiMR Register in Pulse Period and Pulse Width Measurement Mode
Rev. 2.00 Feb.15, 2007 ^{page 113} of 329
REJ09B0202-0200