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M16C26A Datasheet, PDF (187/352 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/Tiny SERIES
M16C/26A Group (M16C/26A, M16C/26B, M16C/26T)
13. Serial I/O
Table 13.1.4.2. Registers to Be Used and Settings in Special Mode 2
Register
U2TB(1)
U2RB(1)
Bit
0 to 7
0 to 7
Function
Set transmission data
Reception data can be read
OER
Overrun error flag
U2BRG 0 to 7
U2MR(1) SMD2 to SMD0
Set a transfer rate
Set to ‘0012’
CKDIR
Set this bit to “0” for master mode or “1” for slave mode
IOPOL
Set to “0”
U2C0
CLK1, CLK0
Select the count source for the U2BRG register
CRS
Invalid because CRD = 1
TXEPT
Transmit register empty flag
CRD
Set to “1”
NCH
Select TxD2 pin output format
CKPOL
Clock phases can be set in combination with the CKPH bit in the U2SMR3
register
UFORM
Set to “0”
U2C1
TE
Set this bit to “1” to enable transmission
TI
Transmit buffer empty flag
RE
Set this bit to “1” to enable reception
RI
Reception complete flag
U2IRS
Select UART2 transmit interrupt cause
U2RRM,
Set to “0”
U2LCH, U2ERE
U2SMR 0 to 7
Set to “0”
U2SMR2 0 to 7
Set to “0”
U2SMR3 CKPH
Clock phases can be set in combination with the CKPOL bit in the U2C0 register
NODC
Set to “0”
0, 2, 4 to 7
Set to “0”
U2SMR4 0 to 7
Set to “0”
NOTE:
1. Not all bits in the register are described above. Set those bits to “0” when writing to the registers in
Special Mode 2.
Rev. 2.00 Feb.15, 2007 page 170 of 329
REJ09B0202-0200