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M16C26A Datasheet, PDF (214/352 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/Tiny SERIES
M16C/26A Group (M16C/26A, M16C/26B, M16C/26T)
14. A/D Converter
A/D control register 0 (1)
b7 b6 b5 b4 b3 b2 b1 b0
10
Symbol
ADCON0
Address
03D616
Bit symbol
Bit name
CH0
Analog Input Pin
Select Bit
CH1
After reset
00000XXX 2
Function
RW
Invalid in simultaneous sample sweep mode RW
RW
CH2
MD0
MD1
TRG
ADST
A/D Operation Mode
Select Bit 0
Trigger Select Bit
A/D Conversion Start Fag
b4 b3
1 0 : Single sweep mode or simultaneous
sample sweep mode
Refer to Table 14.1.6.2 Trigger Select Bit
Setting in Simultaneous Sample Sweep
Mode
0 : A/D conversion disabled
1 : A/D conversion started
CKS0 Frequency Select Bit 0
Refer to Table 14.2 A/D Conversion
Frequency Select
NOTE:
1. If the ADCON0 register is rewritten during A/D conversion, the conversion result will be indeterminate.
RW
RW
RW
RW
RW
RW
A/D control register 1 (1)
b7 b6 b5 b4 b3 b2 b1 b0
1
0
Symbol
ADCON1
Address
03D716
After reset
0016
Bit symbol
SCAN0
SCAN1
MD2
BITS
Bit name
A/D Sweep Pin
Select Bit (2)
A/D Operation Mode
Select Bit 1
8/10-Bit Mode Select Bit
Function
When selecting simultaneous sample sweep
mode
b1 b0
0 0 : AN0 to AN1 (2 pins)
0 1 : AN0 to AN3 (4 pins)
1 0 : AN0 to AN5 (6 pins)
1 1 : AN0 to AN7 (8 pins)
0 : Any mode other than repeat sweep
mode 1
0 : 8-bit mode
1 : 10-bit mode
CKS1
VCUT
Frequency Select Bit 1
VREF Connect Bit (3)
Refer to Table 14.2 A/D Conversion
Frequency Select
1 : VREF connected
(b7-b6)
Nothing is assigned. When write, set to “0”.
When read, its content is “0”.
RW
RW
RW
RW
RW
RW
RW
NOTES:
1. If the ADCON1 register is rewritten during A/D conversion, the conversion result will be indeterminate.
2. AN30 to AN32 can be used in the same way as AN0 to AN7. Use the ADGSEL1 to ADGSET0 bits in the ADCON2
register to select the desired pin.
3. If the VCUT bit is reset from “0” (VREF unconnected) to “1” (VREF connected), wait for 1 µs or more before starting
A/D conversion.
A/D control register 2 (1)
b7 b6 b5 b4 b3 b2 b1 b0
0
1
Symbol
ADCON2
Address
03D416
After reset
0016
Bit symbol
Bit name
SMP
A/D Conversion Method
Select Bit
ADGSEL0 A/D Input Group
Select Bit
ADGSEL1
(b3)
CKS2
Reserved Bit
Frequency Select Bit 2
Function
Set to “1” in simultaneous sample
sweep mode
b2 b1
0 0 : Select port P10 group (AN i)
0 1 : Select port P9 group (AN 3i)
1 0 : Do not set
1 1 : Do not set
Set to “0”
Refer to Table 14.2 A/D Conversion
Frequency Select
RW
RW
RW
RW
RW
RW
TRG1
Trigger select bit 1
Refer to Table 14.1.6.2 Trigger Select Bit
Setting in Simultaneous Sample Sweep
RW
Mode
(b7-b6)
Nothing is assigned. When write, set to “0”.
When read, its content is “0”.
NOTE:
1. If the ADCON2 register is rewritten during A/D conversion, the conversion result will be indeterminate.
Figure 14.1.6.2 ADCON0 to ADCON2 Registers for Simultaneous Sample Sweep Mode
Rev. 2.00 Feb.15, 2007 page 197 of 329
REJ09B0202-0200