M16C26A Datasheet, PDF (169/352 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/Tiny SERIES

M16C/26A Group (M16C/26A, M16C/26B, M16C/26T)
13. Serial I/O
Table 13.1.2.3 lists the functions of the input/output pins during UART mode. Table 13.1.2.4 lists the P64
pin functions during UART mode. Note that for a period from when the UARTi operation mode is selected
to when transfer starts, the TxDi pin outputs an “H”. (If the N-channel open-drain output is selected, this
pin is in a high-impedance state.)
Table 13.1.2.3. I/O Pin Functions in UART mode⁽¹⁾
Pin name
Function
TxDi (i = 0 to 2) _{Serial data output}
(P63, P67, P70)
Method of selection
(Outputs "H" when performing reception only)
RxDi
Serial data input
(P62, P66, P71)
PD6_2 bit, PD6_6 bit in the PD6 register and the PD7_1 bit in the PD7 register
(Can be used as an input port when performing transmission only)
CLKi
Input/output port
(P61, P65, P72)
Transfer clock input
CTSi/RTSi
CTS input
(P60, P64, P73)
RTS output
Input/output port
Set the CKDIR bit in the UiMR register to "0"
Set the CKDIR bit in the UiMR register to "1"
Set the PD6_1 bit and PD6_5 bit in the PD6 register to "0", PD7_2 bit in the PD7
register to "0"
Set the CRD bit in the UiC0 register to "0"
Set the CRS bit in the UiC0 register to "0"
Set the PD6_0 bit and PD6_4 bit in the PD6 register to "0", the PD7_3 bit in the
PD7 register "0"
Set the CRD bit in the UiC0 register to "0"
Set the CRS bit in the UiC0 register to "1"
Set the CRD bit in the UiC0 register "1"
NOTE:
1. When the U1MAP bit in PACR register is set to “1” (P73 to P70), UART1 pin is assgined to P73 to P70.
Table 13.1.2.4. P64 Pin Functions in UART mode⁽¹⁾
Pin function
P64
CTS1
RTS1
CTS0 ⁽²⁾
U1C0 register
CRD CRS
1
0
0
0
1
0
0
Bit set value
UCON register
RCSP CLKMD1
0
0
0
0
0
0
1
0
PD6 register
PD6_4
Input: 0, Output: 1
0
0
NOTES:
1. When the U1MAP bit in PACR register is “1” (P73 to P70), this table lists the P70 functions.
2. In addition to this, set the CRD bit in the U0C0 register to “0” (CTS0/RTS0 enabled) and the CRS bit in the U0C0
register to “1” (RTS0 selected).
Rev. 2.00 Feb.15, 2007 ^{page 152} of 329
REJ09B0202-0200