M16C26A Datasheet, PDF (84/352 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/Tiny SERIES

M16C/26A Group (M16C/26A, M16C/26B, M16C/26T)
9. Interrupt
Interrupt control register ⁽²⁾
Symbol
Address
After reset
b7 b6 b5 b4 b3 b2 b1 b0
BCNIC
DM0IC, DM1IC
KUPIC
ADIC
S0TIC to S2TIC
S0RIC to S2RIC
TA0IC to TA4IC
TB0IC to TB2IC
004A16
004B16, 004C16
004D16
004E16
005116, 005316, 004F16
005216, 005416, 005016
005516 to 005916
005A16 to 005C16
XXXXX000 2
XXXXX000 2
XXXXX000 2
XXXXX000 2
XXXXX000 2
XXXXX000 2
XXXXX000 2
XXXXX000 2
Bit symbol
Bit name
Function
RW
ILVL0
Interrupt priority level
select bit
b2 b1 b0
RW
0 0 0 : Level 0 (interrupt disabled)
0 0 1 : Level 1
ILVL1
0 1 0 : Level 2
0 1 1 : Level 3
RW
1 0 0 : Level 4
1 0 1 : Level 5
ILVL2
1 1 0 : Level 6
1 1 1 : Level 7
RW
IR
Interrupt request bit
0 : Interrupt not requested
RW
1 : Interrupt requested
(1)
(b7-b4)
No functions are assigned.
When writing to these bits, write “0”. The values in these bits
when read are indeterminate.
NOTES:
1.This bit can only be reset by writing “0” (Do not write “1”).
2. To rewrite the interrupt control registers, do so at a point that does not generate the interrupt request for that
register. For details, see 19.5 Interrupts.
b7 b6 b5 b4 b3 b2 b1 b0
0
Symbol
INT3IC
INT5IC
INT4IC
INT0IC to INT2IC
Address
004416
004816
004916
005D16 to 005F16
After reset
XX00X0002
XX00X0002
XX00X0002
XX00X0002
Bit symbol
Bit name
Function
RW
ILVL0 Interrupt priority level
select bit
b2 b1 b0
0 0 0 : Level 0 (interrupt disabled)
RW
0 0 1 : Level 1
ILVL1
0 1 0 : Level 2
0 1 1 : Level 3
1 0 0 : Level 4
RW
1 0 1 : Level 5
ILVL2
1 1 0 : Level 6
1 1 1 : Level 7
RW
IR
Interrupt request bit
0: Interrupt not requested
RW
1: Interrupt requested
(1)
POL
Polarity select bit
0 : Selects falling edge ⁽³⁾
1 : Selects rising edge
RW
(b5)
Reserved bit
Must always be set to “0”
RW
No functions are assigned.
(b7-b6)
When writing to these bits, write “0”. The values in these bits
RW
when read are indeterminate.
NOTES:
1. This bit can only be reset by writing “0” (Do not write “1”).
2. To rewrite the interrupt control register, do so at a point that does not generate the interrupt request for that register.
For details, see 19.5 Interrupts.
3. If the IFSRi bit (i = 0 to 5) in the IFSR register is “1” (both edges), set the POL bit in the INTiIC register to “0” (falling
edge).
Figure 9.3.1. Interrupt Control Registers
BCNIC, DM0IC, DM1IC, KUPIC, ADIC, S0TIC to S2TIC, S0RIC to S2RIC, TA0IC to TA4IC, TB0IC TO
TB2IC, INT3IC, INT4IC, INT5IC, INT0IC to INT2IC
Rev. 2.00 Feb.15, 2007 ^{page 67} of 329
REJ09B0202-0200