M16C26A Datasheet, PDF (58/352 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/Tiny SERIES

M16C/26A Group (M16C/26A, M16C/26B, M16C/26T)
7. Clock Generation Circuit
System clock control register 1 (1)
b7 b6 b5 b4 b3 b2 b1 b0
000
Symbol
CM1
Address
000716
After reset
001000002
Bit symbol
Bit name
Function
RW
CM10 ^{All clock stop control bit}
(4, 6)
0 : Clock on
1 : All clocks off (stop mode)
RW
CM11
System clock select bit 1
(6, 7)
0 : Main clock
1 : PLL clock (5)
RW
(b4-b2) ^{Reserved bit}
Must set to “0”
RW
CM15
XIN-XOUT drive capacity
select bit (2)
0 : LOW
1 : HIGH
RW
b7 b6
CM16 ^{Main clock division}
0 0 : No division mode
RW
select bits (3)
0 1 : Division by 2 mode
CM17
1 0 : Division by 4 mode
1 1 : Division by 16 mode
RW
NOTES:
1. Write to this register after setting the PRC0 bit in the PRCR register to “1” (write enable).
2. When entering stop mode from high or middle speed mode, or when the CM05 bit is set to “1” (main clock turned off) in low
speed mode, the CM15 bit is set to “1” (drive capability high).
3. Effective when the CM06 bit is “0” (CM16 and CM17 bits enable).
4. If the CM10 bit is “1” (stop mode), XOUT goes “H” and the internal feedback resistor is disconnected. The XCIN and XCOUT pins
are placed in the high-impedance state. When the CM11 bit is set to “1” (PLL clock), or the CM20 bit in the CM2 register is set
to “1” (oscillation stop, re-oscillation detection function enabled), do not set the CM10 bit to “1”.
5. After setting the PLC07 bit in the PLC0 register to “1” (PLL operation), wait until Tsu (PLL) elapses before setting the CM11 bit
to “1” (PLL clock).
6. When the PM21 bit in the PM2 register is set to “1” (clock modification disable), writing to the CM10, CM011 bits has no effect.
When the PM22 bit in the PM2 register is set to “1” (watchdog timer count source is on-chip oscillator clock), writing to the CM10
bit has no effect.
7. Effective when CM07 bit is “0” and CM21 bit is “0” .
Figure 7.3. CM1 Register
On-chip Oscillator Control Register ⁽¹⁾
b7 b6 b5 b4 b3 b2 b1 b0
00 0
Symbol
ROCR
Address
025C16
After Reset
X0000101 2
Bit Symbol
Bit Name
Function
RW
b1 b0
ROCR0 ^{Frequency select bits}
0 0: f1 (ROC)
RW
0 1: f2 (ROC)
1 0: Do not set to this value
ROCR1
1 1: f3 (ROC)
RW
b3 b2
ROCR2 ^{Divider select bits}
0 0: Do not set to this value
RW
0 1: divide by 2
ROCR3
1 0: divide by 4
1 1: divide by 8
RW
(b6-b4) Reserved bit
Set to 0
RW
(b7)
Nothing is assigned. When write, set to 0. When read, its
content is undefined
NOTE:
1. Write to this register after setting the PRC0 bit in the PRCR register to 1 (write enable).
Figure 7.4. ROCR Register
Rev. 2.00 Feb.15, 2007 ^{page 41} of 329
REJ09B0202-0200