M16C26A Datasheet, PDF (136/352 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/Tiny SERIES

M16C/26A Group (M16C/26A, M16C/26B, M16C/26T)
12. Timer
Three-phase PWM control register 0 (1)
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
INVC0
Address
034816
After reset
0016
Bit symbol
Bit name
INV00
Effective interrupt output
polarity select bit
INV01
INV02
(3)
Effective interrupt output
specification bit
(2, 3)
Mode select bit (4)
INV03
Output control bit (6)
INV04
INV05
INV06
INV07
Positive and negative
phases concurrent output
disable bit
Positive and negative
phases concurrent output
detect flag
Modulation mode select
bit
(8)
Software trigger select bit
Description
RW
0: The ICTB2 counter is incremented by
one on the rising edge of the timer A1
reload control signal
1: The ICTB2 counter is incremented by
RW
one on the falling edge of the timer A1
reload control signal
0: ICTB2 counter incremented by 1 at a
timer B2 underflow
RW
1: Selected by INV00 bit
0: Three-phase motor control timer
function unused
1: Three-phase motor control timer
RW
function
(5)
0: Three-phase motor control timer output
disabled
(5)
1: Three-phase motor control timer output
RW
enabled
(10)
0: Simultaneous active output enabled
1: Simultaneous active output disabled
RW
0: Not detected yet
1: Already detected
(7)
RW
0: Triangular wave modulation mode ₍₉₎
1: Sawtooth wave modulation mode
RW
Setting this bit to “1” generates a transfer
trigger. If the INV06 bit is “1”, a trigger for
the dead time timer is also generated.
RW
The value of this bit when read is “0”.
NOTES:
1. Write to this register after setting the PRC1 bit in the PRCR register to “1” (write enable). Note also that INV00 to INV02,
INV04 and INV06 bits can only be rewritten when timers A1, A2, A4 and B2 are idle.
2. If this bit needs to be set to “1”, set any value in the ICTB2 register before writing to it.
3. Effective when the INV11 bit is set to “1” (three-phase mode 1). If INV11 is set to “0” (three-phase mode 0), the ICTB2
counter is incremented by “1” each time the timer B2 underflows, regardless of whether the INV00 and INV01 bits are set.
When setting the INV01 bit to “1”, set the timer A1 count start flag before the first timer B2 underflow.When the INV00 bit is
set to “1”, the first interrupt is generated when the timer B2 underflowⁿs n-1 times, if n is the value set in the ICTB2 counter.
Subsequent interrupts are generated every n times the timer B2 underflow.
4. Setting the INV02 bit to “1” activates the dead time timer, U/V/W-phase output control circuits and ICTB2 counter.
5. When the INV02 bit is set to “1”(theee-phase control timer functions) and the INV03 is set to "0"(three-phase motor control
timer output disabled), U, U, V, V, W and W pins, including pins shared with other output functions, enter a high-impedance
state.
6. The INV03 bit is set to “0” in the following cases:
• When reset
• When positive and negative go active (INV05="1") simultaneously while INV04 bit is set to “1”
• When set to “0” in a program
• When input on the SD pin changes state from “H” to “L” (The INV03 bit cannot be set to “1” when SD input is “L”.) When
both the INV04 and the INV05 bits are set to “1”, the INV03 bit is set to “0”.
7. Can only be set by writing “0” in a program, and cannot be set to “1”.
8. The effects of the INV06 bit are described in the table below.
Item
INV06=0
INV06=1
Mode
Triangular wave modulation mode
Sawtooth wave modulation mode
Timing at which transferred from IDB0 to
IDB1 registers to three-phase output shift
register
Transferred only once synchronously
with the transfer trigger after writing to
the IDB0 to IDB1 registers
Transferred every transfer trigger
Timing at which dead time timer trigger is
generated when INV16 bit is “0”
Synchronous with the falling edge of
timer A1, A2, or A4 one-shot pulse
Synchronous with the transfer
trigger and the falling edge of timer
A1, A2, or A4 one-shot pulse
INV13 bit
Effective when INV11 is “1” and INV06 Has no effect
is “0”
Transfer trigger: Timer B2 underflow, write to the INV07 bit or write to the TB2 register when INV10 is “1”
9. If the INV06 bit is “1”, set the INV11 bit to “0” (three-phase mode 0) and set the PWCON bit to “0” (timer B2 reloaded by a
timer B2 underflow).
10. Individual pins can be disabled using PFCR register.
Figure 12.3.2. INVC0 Register
Rev. 2.00 Feb.15, 2007 ^{page 119} of 329
REJ09B0202-0200