MC68HC08AS32A Datasheet, PDF (85/296 Pages) Motorola, Inc – Microcontrollers

Freescale Semiconductor, Inc.
Byte Data Link Controller-Digital (BDLC-D)
BDLC CPU Interface
NOTE:
ATE — Analog Transceiver Enable Bit
The analog transceiver enable (ATE) bit is used to select either the on-board or
an off-chip analog transceiver.
1 = Select on-board analog transceiver
0 = Select off-chip analog transceiver
This device does not contain an on-board transceiver. This bit should be
programmed to a logic 0 for proper operation.
RXPOL — Receive Pin Polarity Bit
The receive pin polarity (RXPOL) bit is used to select the polarity of an incoming
signal on the receive pin. Some external analog transceivers invert the receive
signal from the J1850 bus before feeding it back to the digital receive pin.
1 = Select normal/true polarity; true non-inverted signal from the J1850 bus;
for example, the external transceiver does not invert the receive signal
0 = Select inverted polarity, where an external transceiver inverts the receive
signal from the J1850 bus
B03–B00 — BARD Offset Bits
Table 4-2 shows the expected transceiver delay with respect to BARD offset
values.
Table 4-2. BDLC Transceiver Delay
BARD Offset Bits B0[3:0]
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
Corresponding Expected
Transceiver’s Delays (µs)
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
MC68HC08AS32A — Rev. 1
MOTOROLA
Byte Data Link Controller-Digital (BDLC-D)
For More Information On This Product,
Go to: www.freescale.com
Data Sheet
85