MC68HC08AS32A Datasheet, PDF (36/296 Pages) Motorola, Inc – Microcontrollers

Memory
Freescale Semiconductor, Inc.
Addr.
$0035
$0036
$0037
$0038
$0039
$003A
$003B
$003C
$003D
$003E
$003F
Register Name
Bit 7
6
5
4
3
2
1
Bit 0
Timer Channel 5 Status and ^{Read: CH5F}
CH5IE
0
Control Register (TSC5) Write: 0
See page 256. _{Reset: 0}
0
0
MS5A
0
ELS5B
0
ELS5A
0
TOV5 CH5MAX
0
0
Timer Channel 5 Register High ^Read: _{Bit 15}
14
(TCH5H) Write:
See page 260. _Reset:
13
12
11
10
Indeterminate after reset
9
Bit 8
Timer Channel 5 Register Low ^Read: _{Bit 7}
6
(TCH5L) Write:
See page 260. _Reset:
5
4
3
2
Indeterminate after reset
1
Bit 0
Analog-to-Digital Status and ^{Read: COCO}
AIEN
ADCO ADCH4 ADCH3 ADCH2 ADCH1 ADCH0
Control Register (ADSCR) Write: R
See page 58. _{Reset: 0}
0
0
1
1
1
1
1
Analog-to-Digital Data Register ^{Read: AD7}
AD6
AD5
AD4
AD3
AD2
AD1
AD0
(ADR) Write:
See page 60. _Reset:
Unaffected by reset
Analog-to-Digital Input Clock ^Read: _ADIV2
ADIV1
ADIV0
ADICLK
0
0
0
0
Register (ADICLK) Write:
See page 60. _{Reset: 0}
0
0
0
0
0
0
0
BDLC Analog and Roundtrip ^Read: _ATE
RXPOL
0
Delay Register (BARD) Write:
R
See page 84. _{Reset: 1}
1
0
0
BO3
BO2
BO1
BO0
R
0
0
1
1
1
BDLC Control Register 1 ^Read: _IMSG
CLKS
R1
R0
0
0
IE
WCM
(BCR1) Write:
R
R
See page 86. _{Reset: 1}
1
1
0
0
0
0
0
BDLC Control Register 2 ^Read:
(BCR2) Write:
See page 88. _Reset:
ALOOP
1
DLOOP
1
RX4XE
0
NBFS
0
TEOD
0
TSIFR TMIFR1 TMIFR0
0
0
0
BDLC State Vector Register ^{Read: 0}
0
I3
I2
I1
I0
0
0
(BSVR) Write: R
R
R
R
R
R
R
R
See page 93. _{Reset: 0}
0
0
0
0
0
0
0
BDLC Data Register ^Read: _BD7
BD6
BD5
BD4
BD3
BD2
BD1
BD0
(BDR) Write:
See page 95. _Reset:
Unaffected by reset
= Unimplemented
R
= Reserved
U = Unaffected
Figure 2-2. Control, Status, and Data Register (Sheet 6 of 8)
Data Sheet
36
Memory
For More Information On This Product,
Go to: www.freescale.com
MC68HC08AS32A — Rev. 1
MOTOROLA