MC68HC08AS32A Datasheet, PDF (37/296 Pages) Motorola, Inc – Microcontrollers

Freescale Semiconductor, Inc.
Memory
Input/Output (I/O) Section
Addr.
$0040
↓
$004A
Register Name
Unimplemented
Bit 7
6
5
4
3
2
1
Bit 0
$004B
PIT Status and Control ^{Read: POF}
Register (PSC) Write: 0
See page 152. _{Reset: 0}
POIE PSTOP
0
1
PIT Counter Register High ^{Read: Bit 15}
14
13
$004C
(PCNTH) Write:
See page 153. _{Reset: 0}
0
0
PIT Counter Register Low ^{Read: Bit 7}
6
5
$004D
(PCNTL) Write:
See page 153. _{Reset: 0}
0
0
PIT Counter Modulo Register ^Read: _{Bit 15}
14
13
$004E
High (PMODH) Write:
See page 154. _{Reset: 1}
1
1
PIT Counter Modulo Register ^Read: _{Bit 7}
6
5
$004F
Low (PMODL) Write:
See page 154. _{Reset: 1}
1
1
SIM Break Status Register ^Read:
R
R
R
$FE00
(SBSR) Write:
See page 213. _Reset:
SIM Reset Status Register ^{Read: POR}
PIN
COP
$FE01
(SRSR) Write:
See page 213. _{Reset: 1}
0
0
SIM Break Flag Control Register ^Read: _BCFE
R
R
$FE03
(SBFCR) Write:
See page 214. _{Reset: 0}
$FE09
Mask Option Register 2 ^{Read: EEDIVCLK}
(MORB) Write:
See page 147. _Reset:
Break Address Register High ^Read: _{Bit 15}
14
13
$FE0C
(BRKH) Write:
See page 266. _{Reset: 0}
0
0
Break Address Register Low ^Read: _{Bit 7}
6
5
$FE0D
(BRKL) Write:
See page 266. _{Reset: 0}
0
0
= Unimplemented
0
0
PPS2
PRST
0
0
0
12
11
10
0
0
0
4
3
2
0
0
0
12
11
10
1
1
1
4
3
2
1
1
1
R
R
R
ILOP
ILAD
0
0
0
0
R
R
R
AS32A
Unaffected by reset
12
11
10
0
0
0
4
3
2
0
0
0
R
= Reserved
Figure 2-2. Control, Status, and Data Register (Sheet 7 of 8)
PPS1
0
9
PPS0
0
Bit 8
0
0
1
Bit 0
0
0
9
Bit 8
1
1
1
Bit 0
1
1
SBSW
R
0
LVI
0
0
0
R
R
9
Bit 8
0
0
1
Bit 0
0
0
U = Unaffected
MC68HC08AS32A — Rev. 1
MOTOROLA
Memory
For More Information On This Product,
Go to: www.freescale.com
Data Sheet
37