MC68HC08AS32A Datasheet, PDF (160/296 Pages) Motorola, Inc – Microcontrollers

Freescale Semiconductor, Inc.
Input/Output (I/O) Ports
Table 12-2. Port B Pin Functions
DDRB PTB
Bit
Bit
Bit in Use
by ADC
I/O Pin
Mode
Accesses
to DDRB
Read/Write
0
X
No
Input, Hi-Z
DDRB[7:0]
1
X
No
Output
DDRB[7:0]
0
X
Yes
Input, Hi-Z
DDRB[7:0]
1
X
Yes
Input, Hi-Z
DDRB[7:0]
X = Don’t Care
Hi-Z = High Impedance
1. Writing affects data register, but does not affect input.
Accesses to PTB
Read
Pin
PTB[7:0]
0
PTB[7:0]
Write
PTB[7:0]⁽¹⁾
PTB[7:0]
PTB[7:0]⁽¹⁾
PTB[7:0]
12.4 Port C
Port C is a 5-bit general-purpose bidirectional I/O port that shares one of its pins
with the bus clock (MCLK).
12.4.1 Port C Data Register
The port C data register contains a data latch for each of the five port C pins.
Address:
Read:
Write:
Reset:
$0002
Bit 7
0
Alternate
Functions:
6
5
4
3
2
0
0
PTC4
PTC3
PTC2
= Unimplemented
Unaffected by Reset
MCLK
Figure 12-8. Port C Data Register (PTC)
1
PTC1
Bit 0
PTC0
PTC[4:0] — Port C Data Bits
These read/write bits are software-programmable. Data direction of each port C
pin is under the control of the corresponding bit in data direction register C.
Reset has no effect on port C data.
MCLK — T12 System Bus Clock Bit
The bus clock (MCLK) is driven out of PTC2 when enabled by the MCLKEN bit
in PTCDDR7.
Data Sheet
160
Input/Output (I/O) Ports
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MC68HC08AS32A — Rev. 1
MOTOROLA