MC68HC08AS32A Datasheet, PDF (154/296 Pages) Motorola, Inc – Microcontrollers

Freescale Semiconductor, Inc.
Programmable Interrupt Timer (PIT)
11.7.3 PIT Counter Modulo Registers
The read/write PIT modulo registers contain the modulo value for the PIT counter.
When the PIT counter reaches the modulo value the overflow flag (POF) becomes
set and the PIT counter resumes counting from $0000 at the next timer clock.
Writing to the high byte (PMODH) inhibits the POF bit and overflow interrupts until
the low byte (PMODL) is written. Reset sets the PIT counter modulo registers.
NOTE:
Address: $004E
Bit 7
6
5
4
3
2
1
Bit 0
Read:
Bit 15
14
13
12
11
10
Write:
Reset: 1
1
1
1
1
1
9
Bit 8
1
1
Address: $004F
Bit 7
6
5
4
3
2
1
Bit 0
Read:
Bit 7
6
5
4
3
2
1
Bit 0
Write:
Reset: 1
1
1
1
1
1
1
1
Figure 11-5. PIT Counter Modulo Registers (PMODH–PMODL)
Reset the PIT counter before writing to the PIT counter modulo registers.
Data Sheet
154
Programmable Interrupt Timer (PIT)
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MC68HC08AS32A — Rev. 1
MOTOROLA