MC68HC08AS32A Datasheet, PDF (155/296 Pages) Motorola, Inc – Microcontrollers

Freescale Semiconductor, Inc.
Data Sheet — MC68HC08AS32A
Section 12. Input/Output (I/O) Ports
12.1 Introduction
Forty bidirectional input/output (I/O) pins form six parallel ports. All I/O pins are
programmable as inputs or outputs.
NOTE:
Connect any unused I/O pins to an appropriate logic level, either V_DD or V_SS.
Although the I/O ports do not require termination for proper operation, termination
reduces excess current consumption and the possibility of electrostatic damage.
Addr.
$0000
$0001
$0002
$0003
$0004
$0005
$0006
$0007
Register Name
Bit 7
Port A Data Register ^Read:
(PTA) Write:
See page 156. _Reset:
PTA7
Port B Data Register ^Read:
(PTB) Write:
See page 158. _Reset:
PTB7
Port C Data Register ^Read:
0
(PTC) Write:
See page 160. _Reset:
Port D Data Register ^Read:
0
(PTD) Write:
See page 162. _Reset:
Data Direction Register A ^Read:
(DDRA) Write:
See page 157. _Reset:
DDRA7
0
Data Direction Register B ^Read:
(DDRB) Write:
See page 159. _Reset:
DDRB7
0
Data Direction Register C
(DDRC)
See page 161.
Read:
Write:
Reset:
MCLKEN
0
Data Direction Register D ^Read:
0
(DDRD) Write:
See page 163. _Reset:
0
6
PTA6
5
PTA5
PTB6 PTB5
0
0
PTD6 PTD5
DDRA6 DDRA5
0
0
DDRB6 DDRB5
0
0
0
0
0
0
DDRD6 DDRD5
0
0
= Unimplemented
4
3
PTA4
PTA3
Unaffected by reset
PTB4
PTB3
Unaffected by reset
PTC4
PTC3
Unaffected by reset
PTD4
PTD3
Unaffected by reset
DDRA4 DDRA3
0
0
DDRB4 DDRB3
0
0
DDRC4 DDRC3
0
0
DDRD4 DDRD3
0
0
Figure 12-1. I/O Port Register Summary
2
PTA2
PTB2
PTC2
PTD2
DDRA2
0
DDRB2
0
DDRC2
0
DDR2
0
1
PTA1
PTB1
PTC1
PTD1
DDRA1
0
DDRB1
0
DDRC1
0
DDRD1
0
Bit 0
PTA0
PTB0
PTC0
PTD0
DDRA0
0
DDRB0
0
DDRC0
0
DDRD0
0
MC68HC08AS32A — Rev. 1
MOTOROLA
Input/Output (I/O) Ports
For More Information On This Product,
Go to: www.freescale.com
Data Sheet
155