MC68HC08AS32A Datasheet, PDF (46/296 Pages) Motorola, Inc – Microcontrollers

Memory
Freescale Semiconductor, Inc.
different. For forward compatibility, software should not make any dependency on
this delay time.
E. Any attempt to clear both EEPGM and EELAT bits with a single instruction will
only clear EEPGM. This is to allow time for the completion of the on-board
programming sequence and removal of high voltage from the EEPROM array.
F. It is proper to disable interrupts prior to performing an erase cycle. If the cycle is
interrupted, any/all data in the array could be erased.
2.5.2 EEPROM Register Descriptions
Four I/O registers and three non-volatile registers control program, erase, and
options of the EEPROM array.
2.5.2.1 EEPROM Control Register
This read/write register controls programming/erasing of the array.
Address: $FE1D
Bit 7
Read:
UNUSED
Write:
Reset: 0
6
5
0
EEOFF
0
0
= Unimplemented
4
3
EERAS1 EERAS0
0
0
2
EELAT
0
1
AUTO
0
Bit 0
EEPGM
0
Figure 2-3. EEPROM Control Register (EECR)
Bit 7 — Unused Bit
This read/write bit is software programmable but has no functionality.
EEOFF — EEPROM Power Down
This read/write bit disables the EEPROM module for lower power consumption.
Any attempts to access the array will give unpredictable results. Reset clears
this bit.
1 = Disable EEPROM array
0 = Enable EEPROM array
EERAS1 and EERAS0 — Erase/Program Mode Select Bits
These read/write bits set the programming/erasing modes. Reset clears these
bits.
NOTE: Modifying these bits during a program/erase cycle may result in the loss of any/all
data in the array.
Data Sheet
46
Memory
For More Information On This Product,
Go to: www.freescale.com
MC68HC08AS32A — Rev. 1
MOTOROLA