MC68HC08AS32A Datasheet, PDF (143/296 Pages) Motorola, Inc – Microcontrollers

Freescale Semiconductor, Inc.
Low-Voltage Inhibit (LVI)
Low-Power Modes
9.6 Low-Power Modes
The STOP and WAIT instructions put the MCU in low-power standby modes.
9.6.1 Wait Mode
With the LVIPWR bit in the MORA register programmed to logic 1, the LVI module
is active after a WAIT instruction.
With the LVIRST bit in the MORA register programmed to logic 1, the LVI module
can generate a reset and bring the MCU out of wait mode.
9.6.2 Stop Mode
NOTE:
If enabled in stop mode (LVISTOP and LVIPWR bits in the MORA register
programmed to a logic 1), the LVI module remains active in stop mode.
If enabled to generate resets, the LVI module can generate a reset and bring the
MCU out of stop mode.
If the LVIPWR bit is at logic 1, the LVISTOP bit must be at logic 0 to meet the
minimum stop mode I_DD specification.
MC68HC08AS32A — Rev. 1
MOTOROLA
Low-Voltage Inhibit (LVI)
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Data Sheet
143