MC68HC08AS32A Datasheet, PDF (242/296 Pages) Motorola, Inc – Microcontrollers

Freescale Semiconductor, Inc.
Timer Interface (TIM)
Addr.
$0020
$0022
$0023
$0024
$0025
$0026
$0027
$0028
$0029
$002A
$002B
$002C
Register Name
Timer Status and Control ^Read:
Register (TSC) Write:
See page 253. _Reset:
Timer Counter Register High ^Read:
(TCNTH) Write:
See page 254. _Reset:
Timer Counter Register Low ^Read:
(TCNTL) Write:
See page 254. _Reset:
Timer Modulo Register High ^Read:
(TMODH) Write:
See page 255. _Reset:
Timer Modulo Register Low ^Read:
(TMODL) Write:
See page 255. _Reset:
Timer Channel 0 Status and ^Read:
Control Register (TSC0) Write:
See page 256. _Reset:
Timer Channel 0 Register High ^Read:
(TCH0H) Write:
See page 260. _Reset:
Timer Channel 0 Register Low ^Read:
(TCH0L) Write:
See page 260. _Reset:
Timer Channel 1 Status and ^Read:
Control Register (TSC1) Write:
See page 256. _Reset:
Timer Channel 1 Register High ^Read:
(TCH1H) Write:
See page 260. _Reset:
Timer Channel 1 Register Low ^Read:
(TCH1L) Write:
See page 260. _Reset:
Timer Channel 2 Status and ^Read:
Control Register (TSC2) Write:
See page 256. _Reset:
Bit 7
TOF
0
0
Bit 15
0
Bit 7
0
Bit 15
1
Bit 7
1
CH0F
0
0
Bit 15
Bit 7
CH1F
0
0
Bit 15
Bit 7
CH2F
0
0
6
5
4
3
2
0
0
TOIE TSTOP
PS2
TRST
0
1
0
0
0
14
13
12
11
10
0
0
0
0
0
6
5
4
3
2
0
0
0
0
0
14
13
12
11
10
1
1
1
1
1
6
5
4
3
2
1
1
1
1
1
CH0IE MS0B MS0A ELS0B ELS0A
0
0
0
0
0
14
13
12
11
10
Indeterminate after reset
6
5
4
3
2
CH1IE
Indeterminate after reset
0
MS1A ELS1B ELS1A
0
0
0
0
0
14
13
12
11
10
Indeterminate after reset
6
5
4
3
2
Indeterminate after reset
CH2IE MS2B MS2A ELS2B ELS2A
0
0
0
0
0
= Unimplemented
Figure 16-3. TIM I/O Register Summary
1
Bit 0
PS1
PS0
0
0
9
Bit 8
0
0
1
Bit 0
0
0
9
Bit 8
1
1
1
Bit 0
1
1
TOV0 CH0MAX
0
0
9
Bit 8
1
Bit 0
TOV1 CH1MAX
0
0
9
Bit 8
1
Bit 0
TOV2 CH2MAX
0
0
Data Sheet
242
Timer Interface (TIM)
For More Information On This Product,
Go to: www.freescale.com
MC68HC08AS32A — Rev. 1
MOTOROLA