MC68HC08AS32A Datasheet, PDF (271/296 Pages) Motorola, Inc – Microcontrollers

Freescale Semiconductor, Inc.
Development Support
Monitor Module (MON)
17.3.1.2 Monitor Vectors
In monitor mode, the MCU uses different vectors for reset, SWI (software interrupt),
and break interrupt than those for user mode. The alternate vectors are in the $FE
page instead of the $FF page and allow code execution from the internal monitor
firmware instead of user code. The COP module is disabled in monitor mode as
long as V_TST is applied to either the IRQ pin or the RST pin.
Table 17-2 summarizes the differences between user mode and monitor mode
regarding vectors.
Table 17-2. Mode Differences
Functions
Modes
COP
Reset
Vector
High
Reset
Vector
Low
Break
Vector
High
Break
Vector
Low
SWI
Vector
High
SWI
Vector
Low
User
Enabled
$FFFE $FFFF $FFFC $FFFD $FFFC $FFFD
Monitor _Disabled⁽¹⁾ $FEFE $FEFF $FEFC $FEFD $FEFC $FEFD
1. If the high voltage (V_TST) is removed from the IRQ pin while in monitor mode, the SIM asserts
its COP enable output. The COP is a mask option enabled or disabled by the COPD bit in the
configuration register. (See 18.5 5.0-Volt DC Electrical Characteristics.)
17.3.1.3 Data Format
Communication with the monitor ROM is in standard non-return-to-zero (NRZ)
mark/space data format. Transmit and receive baud rates must be identical.
START
BIT BIT 0
BIT 1 BIT 2 BIT 3 BIT 4 BIT 5 BIT 6 BIT 7
Figure 17-8. Monitor Data Format
NEXT
START
STOP BIT
BIT
17.3.1.4 Break Signal
A start bit (logic 0) followed by nine logic 0 bits is a break signal. When the monitor
receives a break signal, it drives the PTA0 pin high for the duration of two bits and
then echoes back the break signal.
MISSING STOP BIT
2-STOP BIT DELAY BEFORE ZERO ECHO
01234567
01234567
Figure 17-9. Break Transaction
MC68HC08AS32A — Rev. 1
MOTOROLA
Development Support
For More Information On This Product,
Go to: www.freescale.com
Data Sheet
271