MC68HC08AS32A Datasheet, PDF (61/296 Pages) Motorola, Inc – Microcontrollers

Freescale Semiconductor, Inc.
Analog-to-Digital Converter (ADC)
I/O Registers
ADICLK — ADC Input Clock Register Bit
ADICLK selects either bus clock or CGMXCLK as the input clock source to
generate the internal ADC clock. Reset selects CGMXCLK as the ADC clock
source.
If the external clock (CGMXCLK) is equal to or greater than 1 MHz, CGMXCLK
can be used as the clock source for the ADC. If CGMXCLK is less than 1 MHz,
use the PLL-generated bus clock as the clock source. As long as the internal
ADC clock is at approximately 1 MHz, correct operation can be guaranteed.
(See 18.7 ADC Characteristics.)
1 = Internal bus clock
0 = External clock (CGMXCLK)
1 MHz = ^fX^CL^K^or^B^us^F^req^u^en^cy
ADIV[2:0]
NOTE: During the conversion process, changing the ADC clock will result in an incorrect
conversion.
MC68HC08AS32A — Rev. 1
MOTOROLA
Analog-to-Digital Converter (ADC)
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Go to: www.freescale.com
Data Sheet
61