MC68HC08AS32A Datasheet, PDF (55/296 Pages) Motorola, Inc – Microcontrollers

Freescale Semiconductor, Inc.
Analog-to-Digital Converter (ADC)
Functional Description
INTERNAL
DATA BUS
READ DDRB/DDRB
WRITE DDRB/DDRD
RESET
WRITE PTB/PTD
READ PTB/PTD
DDRBx/DDRDx
PTBx/PTDx
ADC DATA REGISTER
DISABLE
PTBx/PTDx
ADC CHANNEL x
DISABLE
INTERRUPT
LOGIC
CONVERSION
COMPLETE
AIEN
COCO
CGMXCLK
BUS CLOCK
ADC VOLTAGE IN
ADC
ADCVIN
ADCH[4:0]
CHANNEL
SELECT
ADC CLOCK
CLOCK
GENERATOR
ADIV[2:0] ADICLK
Figure 3-2. ADC Block Diagram
3.3.2 Voltage Conversion
NOTE:
When the input voltage to the ADC equals V_REFH (see 18.7 ADC Characteristics),
the ADC converts the signal to $FF (full scale). If the input voltage equals
V_SSA/V_REFL the ADC converts it to $00. Input voltages between V_REFH and
V_SSA/V_REFL are a straight-line linear conversion. All other input voltages will result
in $FF if greater than V_REFH and $00 if less than V_SSA/V_REFL.
Input voltage should not exceed the analog supply voltages.
3.3.3 Conversion Time
Sixteen ADC internal clocks are required to perform one conversion. The ADC
starts a conversion on the first rising edge of the ADC internal clock immediately
following a write to the ADSCR. If the ADC internal clock is selected to run at 1
MHz, then one conversion will take 16 µs to complete. But since the ADC can run
almost completely asynchronously to the bus clock, (for example, the ADC is
MC68HC08AS32A — Rev. 1
MOTOROLA
Analog-to-Digital Converter (ADC)
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Data Sheet
55