MC68HC08AS32A Datasheet, PDF (214/296 Pages) Motorola, Inc – Microcontrollers

Freescale Semiconductor, Inc.
System Integration Module (SIM)
ILOP — Illegal Opcode Reset Bit
1 = Last reset caused by an illegal opcode
0 = POR or read of SRSR
ILAD — Illegal Address Reset Bit (opcode fetches only)
1 = Last reset caused by an opcode fetch from an illegal address
0 = POR or read of SRSR
LVI — Low-Voltage Inhibit Reset Bit
1 = Last reset was caused by the LVI circuit
0 = POR or read of SRSR
14.7.3 SIM Break Flag Control Register
The SIM break control register contains a bit that enables software to clear status
bits while the MCU is in a break state.
Address: $FE03
Bit 7
6
5
4
3
2
1
Bit 0
Read:
BCFE
R
R
R
R
R
R
R
Write:
Reset: 0
R
= Reserved
Figure 14-20. SIM Break Flag Control Register (SBFCR)
BCFE — Break Clear Flag Enable Bit
In some module registers, this read/write bit will enable software to clear status
bits by accessing status registers only while the MCU is in a break state. To
clear status bits during the break state, the BCFE bit must be set.This operation
is important for modules with status bits which can be cleared only by being
read. See the register descriptions in each module for additional details.
1 = Status bits clearable during break
0 = Status bits not clearable during break
Data Sheet
214
System Integration Module (SIM)
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MC68HC08AS32A — Rev. 1
MOTOROLA