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MC68HC08AS32A Datasheet, PDF (279/296 Pages) Motorola, Inc – Microcontrollers
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Freescale Semiconductor, Inc.
Electrical Specifications
5.0-Volt DC Electrical Characteristics
18.5 5.0-Volt DC Electrical Characteristics
Characteristic(1)
Symbol
Min
Typ(2)
Max
Unit
Output high voltage
(ILoad = –2.0 mA) All Ports, RST
VOH
VDD –0.8
—
—
V
Output low voltage
(ILoad = 1.6 mA) All Ports, RST
VOL
—
—
0.4
V
Input high voltage
All Ports, IRQs, RST, OSC1
VIH
0.7 x VDD
—
VDD
V
Input low voltage
All Ports, IRQs, RST, OSC1
VIL
VSS
—
0.3 x VDD
V
VDD + VDDA/VDDAREF supply current
Run(3)
Wait(4)
Stop(5)
25 °C
–40 °C to +105 °C
–40 °C to +125 °C
25 °C with LVI enabled
–40 °C to +105 °C with LVI enabled
—
—
—
—
30
mA
15
mA
IDD
—
—
—
—
—
—
—
—
5
50
100
400
500
µA
µA
µA
µA
µA
I/O ports Hi-Z leakage current
IL
–1
—
1
µA
Input current
Capacitance
Ports (as input or output)
IIN
COUT
CIN
–1
—
1
µA
—
—
—
—
12
8
pF
Low-voltage inhibit voltage (trip)
VTRIPF
3.8
—
—
V
Low-voltage inhibit voltage (recover)
VTRIPR
—
—
4.49
V
POR rearm voltage(6)
VPOR
0
—
200
mV
POR reset voltage(7)
VPORRST
0
—
800
mV
POR rise time ramp rate(8)
RPOR
0.02
—
—
V/ms
Monitor mode entry and COP disable voltage(9)
VTST
VDD + 2.5
—
9.1
V
1. VDD = 5.0 Vdc ± 10%, VSS = 0 Vdc, TA = –40°C to +105°C, unless otherwise noted.
2. Typical values reflect average measurements at midpoint of voltage range, 25 °C only.
3. Run (Operating) IDD measured using external square wave clock source (fOP = 8.4 MHz). All inputs 0.2 V from rail. No dc
loads. Less than 100 pF on all outputs. CL = 20 pF on OSC2. All ports configured as inputs. OSC2 capacitance linearly
affects run IDD. Measured with all modules enabled.
4. Wait IDD measured using external square wave clock source (fOP = 8.4 MHz). All inputs 0.2 Vdc from rail. No dc loads. Less
than 100 pF on all outputs, CL = 20 pF on OSC2. All ports configured as inputs. OSC2 capacitance linearly affects wait
IDD. Measured with all modules enabled.
5. Stop IDD measured with OSC1 = VSS. All inputs 0.2 V from rail. No dc loads. Less than 100 pF on all outputs. All ports
configured as inputs.
6. Maximum is highest voltage that POR is guaranteed.
7. Maximum is highest voltage that POR is possible.
8. If minimum VDD is not reached before the internal POR reset is released, RST must be driven low externally until minimum
VDD is reached.
9. See 6.8 COP Module During Break Interrupts.
MC68HC08AS32A — Rev. 1
MOTOROLA
Electrical Specifications
For More Information On This Product,
Go to: www.freescale.com
Data Sheet
279
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