N25Q032A13E1241F Datasheet, PDF (9/153 Pages) Micron Technology – 32-Mbit 3 V, multiple I/O, 4-Kbyte subsector erase, XiP enabled, serial flash memory with 108 MHz SPI bus interface

M25Q032 - 3 V
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List of figures
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Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
SO8N, SO8W and MLP8 connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
SO16 connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
BGA connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Bus master and memory devices on the SPI bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
SPI modes supported . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Hold condition activation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Non Volatile and Volatile configuration Register Scheme . . . . . . . . . . . . . . . . . . . . . . . . . 32
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Read identification instruction and data-out sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Read Data Bytes instruction and data-out sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
Read Data Bytes at Higher Speed instruction and data-out sequence . . . . . . . . . . . . . . . 58
Read Serial Flash Discovery Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
Dual Output Fast Read instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
Dual I/O Fast Read instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
Quad Output Fast Read instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
Quad Input/ Output Fast Read instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
Read OTP instruction and data-out sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
Write Enable instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
Write Disable instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
Page Program Instruction Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
Dual Input Fast Program Instruction Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
Dual Input Extended Fast Program instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . 69
Quad Input Fast Program instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
Quad Input Extended Fast Program instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . 71
Program OTP instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
How to permanently lock the OTP bytes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
Subsector Erase instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
Sector Erase instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
Bulk Erase instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
Read Status Register instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
Write Status Register instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
Read Lock Register instruction and data-out sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
Write to Lock Register instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
Read Flag Status Register instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
Clear Flag Status Register instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
Read NV Configuration Register instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
Write NV Configuration Register instruction sequence. . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
Read Volatile Configuration Register instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . 84
Write Volatile Configuration Register instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . 85
Read Volatile Enhanced Configuration Register instruction sequence. . . . . . . . . . . . . . . . 86
Write Volatile Enhanced Configuration Register instruction sequence. . . . . . . . . . . . . . . . 87
Multiple I/O Read Identification instruction and data-out sequence DIO-SPI . . . . . . . . . . . 89
Dual Read Serial Flash Discovery Parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
Dual Command Fast Read instruction and data-out sequence DIO-SPI . . . . . . . . . . . . . . 90
Read OTP instruction and data-out sequence DIO-SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
Write Enable instruction sequence DIO-SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
Write Disable instruction sequence DIO-SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92
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