N25Q032A13E1241F Datasheet, PDF (86/153 Pages) Micron Technology – 32-Mbit 3 V, multiple I/O, 4-Kbyte subsector erase, XiP enabled, serial flash memory with 108 MHz SPI bus interface

Instructions
N25Q032 - 3 V
Figure 41. Read Volatile Enhanced Configuration Register instruction sequence
S
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
C
Instruction
DQ0
Volatile Enhanced
Volatile Enhanced
High Impedance
Configuration Register Out Configuration Register Out
DQ1
76543210765432107
MSB
MSB
9.1.34
Write Volatile Enhanced Configuration Register
The Write Volatile Enhanced Configuration register (WRVECR) instruction allows new
values to be written to the Volatile Enhanced Configuration register. Before it can be
accepted, a write enable (WREN) instruction must previously have been executed. After the
write enable (WREN) instruction has been decoded and executed, the device sets the write
enable latch (WEL).
The Write Volatile Enhanced Configuration register (WRVECR) instruction is entered by
driving Chip Select (S) Low, followed by the instruction code and the data byte on serial data
input (DQ0).
Chip Select (S) must be driven High after the eighth bit of the data byte has been latched in.
If not, the Write Volatile Enhanced Configuration register (WRVECR) instruction is not
executed.
When the new data are latched, the write enable latch (WEL) is reset.
The Write Volatile Enhanced Configuration register (WRVECR) instruction allows the user to
change the values of all the Volatile Enhanced Configuration Register bits, described in
Table 7.: Volatile Enhanced Configuration Register.
The Write Volatile Enhanced Configuration Register impacts the memory behavior right after
the instruction is received by the device.
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