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N25Q032A13E1241F Datasheet, PDF (106/153 Pages) Micron Technology – 32-Mbit 3 V, multiple I/O, 4-Kbyte subsector erase, XiP enabled, serial flash memory with 108 MHz SPI bus interface
Instructions
N25Q032 - 3 V
9.3.2
Note:
Read Serial Flash Discovery Parameter
The Read Serial Flash Discovery Parameter (RDSFDP) instruction allows reading the Serial
Flash Discovery Parameter area (SFDP) in the QIO-SPI protocol. The instruction
functionality is exactly the same as the Read Serial Flash Discovery Parameter instruction
of the Extended SPI protocol. The only difference is that in the QIO-SPI protocol instruction
code, address and output data are all parallelized on the four pins DQ0, DQ1, DQ2 and
DQ3.
The dummy byte bits can not be parallelized: 10 clock cycles are requested to perform the
internal reading operation at highest frequency (108MHz).
Figure 71. Quad Read Serial Flash Discovery Parameter
S
Mode 3
C Mode 0
DQ0
0 1 2 3 4 5 6 7 8 9 10 15 16 17 18 19 20 21 22 23 24 25 26 27
Instruction *24 bit Address
20 16 12 8 4 0
IO switches from Input to Output
4 0 4 04 0 4 0 4 0 4 0
DQ1
DQ2
21 17 13 9 5 1
22 18 14 10 6 2
515151514040
6 26262624040
DQ3
23 19 15 11 7 3
737373734040
Dummy (ex.: 10) Byte 1 Byte 2 Byte 3 Byte 4 Byte 5 Byte 6
The dummy clock cycle depends on the Fast Read configuration in the NVCR/VCR register (default = 8).
*Address bits A[23:11] are “Don’t Care.”
9.3.3
Quad Command Fast Read (QCFR)
The Quad Command Fast Read (QCFR) instruction allows to read the memory in QIO-SPI
protocol, parallelizing the instruction code, the address and the output data on four pins
(DQ0, DQ1, DQ2 and DQ3). The Quad Command Fast Read (QCFR) instruction can be
issued, after the device is set in QIO-SPI mode, by sending to the memory indifferently one
of the 3 instructions codes: 0Bh, 6Bh or EBh, the effect is exactly the same. The 3
instruction codes are all accepted to help the application code porting from Extended SPI
protocol to QIO-SPI protocol.
Apart for the parallelizing on four pins of the instruction code, the Quad Command Fast
Read instruction functionality is exactly the same as the Quad I/O Fast Read of the
Extended SPI protocol.
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