N25Q032A13E1241F Datasheet, PDF (60/153 Pages) Micron Technology – 32-Mbit 3 V, multiple I/O, 4-Kbyte subsector erase, XiP enabled, serial flash memory with 108 MHz SPI bus interface

Instructions
N25Q032 - 3 V
When the highest address is reached, the address counter rolls over to 00 0000h, so that
the read sequence can be continued indefinitely.
Figure 14. Dual Output Fast Read instruction sequence
S
Mode 3
C _{Mode 2}
DQ0
DQ1
0 1 2 3 4 5 6 7 8 9 10
28 29 30 31
Instruction
*24-bit Address
23 22 21
3210
High Impedance
S
32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47
C
Dummy cycles
DQ0
DQ1
642064206420
6420
DATA OUT 1 DATA OUT 2 DATA OUT 3
DATA OUT n
753175317531
MSB
MSB
MSB
7531
MSB
MSB
*Address bits A23 and A22 are “Don’t Care.”
9.1.6
Dual I/O Fast Read
The Dual I/O Fast Read (DIOFR) instruction is very similar to the Dual Output Fast Read
(DOFR), except that the address bits are shifted in on two pins (pin DQ0 and pin DQ1)
instead of only one.
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