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N25Q032A13E1241F Datasheet, PDF (104/153 Pages) Micron Technology – 32-Mbit 3 V, multiple I/O, 4-Kbyte subsector erase, XiP enabled, serial flash memory with 108 MHz SPI bus interface
Instructions
N25Q032 - 3 V
Table 22. Instruction set: QIO-SPI protocol
Instruction
Description
One-byte
Instruction
Code (BIN)
One-byte
Instruction
Code
(HEX)
Address
bytes
Dummy
clock
cycle
Data
bytes
MIORDID Multiple I/O read identification
1010 1111 AFh
0
0
1 to 3
RDSFDP Read Serial Flash Discovery Parameter 01011010 5Ah
3
10 (1)
1 to ∞
0000 1011 0Bh
3
10 (1) 1 to ∞
QCFR
Quad Command Fast Read
0110 1011 6Bh
3
10 (1) 1 to ∞
1110 1011 EBh
3
10 (1) 1 to ∞
ROTP
Read OTP (Read of OTP area)
0100 1011 4Bh
3
10 (1) 1 to 65
WREN
Write Enable
0000 0110 06h
0
0
0
WRDI
QCPP
Write Disable
Quad Command Page Program
0000 0100 04h
0000 0010 02h
0011 0010 32h
0001 0010 12h
0
0
0
3
0
1 to 256
3
0
1 to 256
3
0
1 to 256
POTP
Program OTP (Program of OTP area) 0100 0010 42h
3
0
1 to 65
SSE
SubSector Erase
0010 0000 20h
3
0
0
SE
Sector Erase
1101 1000 D8h
3
0
0
BE
Bulk Erase
1100 0111 C7h
0
0
0
PER
Program/Erase Resume
0111 1010 7Ah
0
0
0
PES
RDSR
WRSR
RDLR
Program/Erase Suspend
Read Status Register
Write Status Register
Read Lock Register
0111 0101 75h
0
0
0
0000 0101 05h
0
0
1 to ∞
0000 0001 01h
0
0
1
1110 1000 E8h
3
0
1 to ∞
WRLR
RFSR
Write to Lock Register
Read Flag Status Register
1110 0101 E5h
3
0
1
0111 0000 70h
0
0
1 to ∞
CLFSR
Clear Flag Status Register
0101 0000 50h
0
0
0
RDNVCR Read NV Configuration Register
1011 0101 B5h
0
0
2
WRNVCR Write NV Configuration Register
1011 0001 B1h
0
0
2
RDVCR
Read Volatile Configuration Register 1000 0101 85h
0
0
1 to ∞
WRVCR
Write Volatile Configuration Register
1000 0001 81h
0
0
1
RDVECR
Read Volatile Enhanced Configuration
Register
0110 0101
65h
0
0
1 to ∞
WRVECR
Write Volatile Enhanced Configuration
Register
0110 0001 61h
0
0
1
1) The number of Dummy Clock cycles is configurable by the user.
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