PIC18F2331 Datasheet, PDF (9/396 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with nanoWatt Technology, High Performance PWM and A/D

PIC18F2331/2431/4331/4431
1.0 DEVICE OVERVIEW
This document contains device specific information for
the following devices:
• PIC18F2331
• PIC18F2431
• PIC18F4331
• PIC18F4431
This family offers the advantages of all PIC18 micro-
controllers – namely, high computational performance
at an economical price, with the addition of high endur-
ance enhanced Flash program memory and a high-
speed 10-bit A/D converter. On top of these features,
the PIC18F2331/2431/4331/4431 family introduces
design enhancements that make these microcontrol-
lers a logical choice for many high performance, power
control and motor control applications. These special
peripherals include:
• 14-bit resolution Power Control PWM Module
(PCPWM) with programmable dead time insertion
• Motion Feedback Module (MFM), including a
3-channel Input Capture (IC) Module and
Quadrature Encoder Interface (QEI)
• High-speed 10-bit A/D Converter (HSADC)
The PCPWM can generate up to eight complementary
PWM outputs with dead-band time insertion. Overdrive
current is detected by off-chip analog comparators or
the digital fault inputs (FLTA, FLTB).
The MFM Quadrature Encoder Interface provides
precise rotor position feedback and/or velocity
measurement. The MFM 3 X input capture or external
interrupts can be used to detect the rotor state for
electrically commutated motor applications using Hall
Sensor feedback, such as BLDC motor drives.
PIC18F2331/2431/4331/4431 devices also feature
Flash program memory and an internal RC oscillator
with built-in LP modes.
1.1 New Core Features
1.1.1 nanoWatt TECHNOLOGY
All of the devices in the PIC18F2331/2431/4331/4431
family incorporate a range of features that can signifi-
cantly reduce power consumption during operation.
Key items include:
• Alternate Run Modes: By clocking the controller
from the Timer1 source or the internal oscillator
block, power consumption during code execution
can be reduced by as much as 90%.
• Multiple Idle Modes: The controller can also run
with its CPU core disabled, but the peripherals are
still active. In these states, power consumption
can be reduced even further, to as little as 4% of
normal operation requirements.
• On-the-fly Mode Switching: The power-man-
aged modes are invoked by user code during
operation, allowing the user to incorporate power
saving ideas into their application’s software
design.
• Lower Consumption in Key Modules: The
power requirements for both Timer1 and the
Watchdog Timer have been reduced by up to
80%, with typical values of 1.1 and 2.1 µA,
respectively.
1.1.2
MULTIPLE OSCILLATOR OPTIONS
AND FEATURES
All of the devices in the PIC18F2331/2431/4331/4431
family offer nine different oscillator options, allowing
users a wide range of choices in developing application
hardware. These include:
• Four crystal modes, using crystals or ceramic
resonators.
• Two external clock modes, offering the option of
using two pins (oscillator input and a divide-by-4
clock output) or one pin (oscillator input, with the
second pin reassigned as general I/O).
• Two external RC oscillator modes, with the same
pin options as the external clock modes.
• An internal oscillator block, which provides an
8 MHz clock and an INTRC source (approxi-
mately 31 kHz, stable over temperature and VDD),
as well as a range of 6 user-selectable clock fre-
quencies (from 125 kHz to 4 MHz) for a total of 8
clock frequencies.
Besides its availability as a clock source, the internal
oscillator block provides a stable reference source that
gives the family additional features for robust
operation:
• Fail-Safe Clock Monitor: This option constantly
monitors the main clock source against a
reference signal provided by the internal
oscillator. If a clock failure occurs, the controller is
switched to the internal oscillator block, allowing
for continued low speed operation or a safe
application shutdown.
• Two-Speed Start-up: This option allows the
internal oscillator to serve as the clock source
from Power-on Reset or wake-up from Sleep
mode, until the primary clock source is available.
This allows for code execution during what would
otherwise be the clock start-up interval, and can
even allow an application to perform routine
background activities and return to Sleep without
returning to full power operation.
 2003 Microchip Technology Inc.
Preliminary
DS39616B-page 7