PIC18F2331 Datasheet, PDF (147/396 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with nanoWatt Technology, High Performance PWM and A/D

PIC18F2331/2431/4331/4431
14.0 TIMER5 MODULE
The Timer5 module implements these features:
• 16-bit timer/counter operation
• Synchronous and asynchronous counter modes
• Continuous and Single-Shot operating modes
• Four programmable prescaler values (1:1 to 1:8)
• Interrupt generated on period match
• Special event trigger Reset function
• Double-buffered registers
• Operation during Sleep
• CPU wake-up from Sleep
• Selectable hardware Reset input with a wake-up
feature
Timer5 is a general-purpose timer/counter that incorpo-
rates additional features for use with the Motion Feed-
back module (see Section 16.0 “Motion Feedback
Module”). It may also be used as a general-purpose
timer or a special event trigger delay timer. When used
as a general-purpose timer, it can be configured to gen-
erate a delayed special event trigger (e.g., an ADC
special event trigger) using a pre-programmed period
delay.
Timer5 is controlled through the Timer5 Control Regis-
ter (T5CON), shown in Register 14-1. The timer can be
enabled or disabled by setting or clearing the control bit
TMR5ON (T5CON<0>).
A block diagram of Timer5 is shown in Figure 14-1.
REGISTER 14-1:
T5CON: TIMER5 CONTROL REGISTER
R/W-0 R/W-0 R/W-0 R/W-0
T5SEN RESEN T5MOD T5PS1
bit 7
R/W-0
T5PS0
R/W-0
T5SYNC
R/W-0
TMR5CS
R/W-0
TMR5ON
bit 0
bit 7
bit 6
bit 5
bit 4:3
bit 2
bit 1
bit 0
T5SEN: Timer5 Sleep Enable bit⁽¹⁾
1 = Timer5 enabled during Sleep
0 = Timer5 disabled during Sleep
RESEN: Special Event Reset Enable bit
1 = Special Event Reset disabled
0 = Special Event Reset enabled
T5MOD: Timer5 Mode bit
1 = Single-Shot mode enabled
0 = Continuous Count mode enabled
T5PS1:T5PS0: Timer5 Input Clock Prescale Select bits
11 =1:8
10 =1:4
01 =1:2
00 =1:1
T5SYNC: Timer5 External Clock Input Synchronization Select bit
When TMR5CS = 1:
1 = Do not synchronize external clock input
0 = Synchronize external clock input
When TMR5CS = 0:
This bit is ignored. Timer5 uses the internal clock when TMR5CS = 0
TMR5CS: Timer5 Clock Source Select bit
1 = External clock from pin T5CKI
0 = Internal clock (TCY)
TMR5ON: Timer5 On bit
1 = Timer5 enabled
0 = Timer5 disabled
Note 1: For Timer5 to operate during Sleep mode, T5SYNC must be set.
Legend:
R = Readable bit
- n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
 2003 Microchip Technology Inc.
Preliminary
DS39616B-page 145