PIC18F2331 Datasheet, PDF (128/396 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with nanoWatt Technology, High Performance PWM and A/D

PIC18F2331/2431/4331/4431
FIGURE 10-24: BLOCK DIAGRAM OF RD3
I²C™ Mode
PORT/ SSPEN & SSPMX Select
SCK/SCL Data Out
0
1
RD LATD
Data Bus
D
Q
WR LATD
or
PORTD
CK Q
Data Latch
D
Q
WR TRISD
CK Q
TRIS Latch
VDD
P
N
VSS
RD3 Pin
RD TRISD
Q
D
Schmitt
Trigger
EN
RD PORTC
SCK or SCL input
Note 1: SCK/SCL are multiplexed on RD3 and RC5 using SSPMX bit in the configuration register.
SSPMX⁽¹⁾
FIGURE 10-25: BLOCK DIAGRAM OF RD2
PORT/SSP Mode & SSPMX Select
SDA Data Out
0
1
RD LATC
Data Bus
D
Q
WR LATC
or
PORTC
CK Q
Data Latch
WR TRISC
D
Q
CK Q
TRIS Latch
SDA Drive
RD TRISC
RD PORTC
Q
D
EN
VDD
P
N
VSS
Schmitt
Trigger
RD2Pin
SSPMX⁽¹⁾
SDI/SDA Input
Note 1: The SDI/SDA bits are multiplexed on RD2 and RC4 pins by SSPMX bit in the configuration register.
DS39616B-page 126
Preliminary
 2003 Microchip Technology Inc.