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PIC18F2331 Datasheet, PDF (305/396 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with nanoWatt Technology, High Performance PWM and A/D | |||
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PIC18F2331/2431/4331/4431
CLRF
Clear f
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
[ label ] CLRF f [,a]
0 ⤠f ⤠255
a â [0,1]
000h â f
1âZ
Z
0110 101a ffff ffff
Clears the contents of the specified
register. If âaâ is 0, the Access Bank
will be selected, overriding the BSR
value. If âaâ = 1, then the bank will
be selected as per the BSR value
(default).
1
Cycles:
1
Q Cycle Activity:
Q1
Q2
Decode
Read
register âfâ
Q3
Process
Data
Q4
Write
register âfâ
Example:
CLRF
Before Instruction
FLAG_REG =
After Instruction
FLAG_REG =
FLAG_REG
0x5A
0x00
CLRWDT
Clear Watchdog Timer
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
[ label ] CLRWDT
None
000h â WDT,
000h â WDT postscaler,
1 â TO,
1 â PD
TO, PD
0000 0000 0000 0100
CLRWDT instruction resets the
Watchdog Timer. It also resets the
postscaler of the WDT. Status bits
TO and PD are set.
1
1
Q Cycle Activity:
Q1
Q2
Decode
No
operation
Q3
Process
Data
Q4
No
operation
Example:
CLRWDT
Before Instruction
WDT Counter
=
After Instruction
WDT Counter
=
WDT Postscaler =
TO
=
PD
=
?
0x00
0
1
1
 2003 Microchip Technology Inc.
Preliminary
DS39616B-page 303
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