PIC18F2331 Datasheet, PDF (14/396 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with nanoWatt Technology, High Performance PWM and A/D

PIC18F2331/2431/4331/4431
TABLE 1-2: PIC18F2331/2431 PINOUT I/O DESCRIPTIONS
Pin Name
Pin
Number ^{Pin Buffer}
Type Type
DIP SOIC
Description
MCLR/VPP/RE3
MCLR
VPP
RE3
11
Master Clear (input) or programming voltage (input).
I
ST
Master Clear (Reset) input. This pin is an active-low
Reset to the device.
P
High-voltage ICSP programming enable pin.
I
ST
Digital input. Available only when MCLR is disabled.
OSC1/CLKI/RA7
OSC1
CLKI
RA7
99
Oscillator crystal or external clock input.
I
ST
Oscillator crystal input or external clock source input.
ST buffer when configured in RC mode, CMOS otherwise.
I CMOS External clock source input. Always associated with pin
function OSC1. (See related OSC1/CLKI, OSC2/CLKO
pins.)
I/O TTL General purpose I/O pin.
OSC2/CLKO/RA6
OSC2
CLKO
RA6
10 10
Oscillator crystal or clock output.
O—
Oscillator crystal output. Connects to crystal or resonator
in Crystal Oscillator mode.
O—
In RC mode, OSC2 pin outputs CLKO, which has 1/4 the
frequency of OSC1 and denotes the instruction cycle rate.
I/O TTL General purpose I/O pin.
PORTA is a bidirectional I/O port.
RA0/AN0
RA0
AN0
22
I/O TTL Digital I/O.
I Analog Analog input 0.
RA1/AN1
RA1
AN1
33
I/O TTL Digital I/O.
I Analog Analog input 1.
RA2/AN2/VREF-/CAP1/INDX 4
RA2
AN2
VREF-
CAP1
INDX
4
I/O TTL Digital I/O.
I Analog Analog input 2.
I Analog A/D Reference Voltage (Low) input.
I
ST
Input capture pin 1.
I
ST
Quadrature Encoder Interface index input pin.
RA3/AN3/VREF+/CAP2/QEA 5
RA3
AN3
VREF+
CAP2
QEA
5
I/O TTL Digital I/O.
I Analog Analog input 3.
I Analog A/D Reference Voltage (High) input.
I
ST
Input capture pin 2.
I
ST
Quadrature Encoder Interface channel A input pin.
RA4/AN4/CAP3/QEB
RA4
AN4
CAP3
QEB
66
I/O TTL Digital I/O.
I Analog Analog input 4.
I
ST
Input capture pin 3.
I
ST
Quadrature Encoder Interface channel B input pin.
Legend: TTL
ST
O
OD
= TTL compatible input
= Schmitt Trigger input with CMOS levels
= Output
= Open-Drain (no diode to VDD)
CMOS = CMOS compatible input or output
I
= Input
P
= Power
DS39616B-page 12
Preliminary
 2003 Microchip Technology Inc.