PIC18F2331 Datasheet, PDF (242/396 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with nanoWatt Technology, High Performance PWM and A/D

PIC18F2331/2431/4331/4431
TABLE 19-8: REGISTERS ASSOCIATED WITH SYNCHRONOUS MASTER RECEPTION
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR, BOR
Value on
all other
Resets
INTCON GIE/GIEH PEIE/GIEL TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF 0000 000x 0000 000u
PIR1
—
ADIF
RCIF TXIF
— CCP1IF TMR2IF TMR1IF -000 -000 -000 -000
PIE1
—
ADIE
RCIE TXIE
— CCP1IE TMR2IE TMR1IE -000 -000 -000 -000
IPR1
—
ADIP
RCIP TXIP
— CCP1IP TMR2IP TMR1IP -111 -111 -111 -111
RCSTA
SPEN
RX9
SREN CREN ADDEN FERR OERR RX9D 0000 -00x 0000 -00x
RCREG USART Receive Register
0000 0000 0000 0000
TXSTA
CSRC
TX9
TXEN SYNC SENDB BRGH TRMT TX9D 0000 0010 0000 0010
BAUDCTL
—
RCIDL
—
SCKP BRG16
—
WUE ABDEN -1-1 0-00 -1-1 0-00
SPBRGH Baud Rate Generator Register, High Byte
0000 0000 0000 0000
SPBRG Baud Rate Generator Register, Low Byte
0000 0000 0000 0000
Legend: x = unknown, – = unimplemented, read as ‘0’. Shaded cells are not used for Synchronous Master Reception.
DS39616B-page 240
Preliminary
 2003 Microchip Technology Inc.