PIC18F2331 Datasheet, PDF (363/396 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with nanoWatt Technology, High Performance PWM and A/D

PIC18F2331/2431/4331/4431
FIGURE 25-11: EXAMPLE SPI MASTER MODE TIMING (CKE = 0)
SS
SCK
(CKP = 0)
SCK
(CKP = 1)
70
71
72
78
79
SDO
80
MSb
79
78
bit6 - - - - - -1
LSb
75, 76
SDI
MSb IN
bit6 - - - -1
74
73
Note: Refer to Figure 25-4 for load conditions.
LSb IN
TABLE 25-11: EXAMPLE SPI MODE REQUIREMENTS (MASTER MODE, CKE = 0)
Param
No.
Symbol
Characteristic
70
TssL2scH, SS↓ to SCK↓ or SCK↑ input
TssL2scL
71
TscH
71A
SCK input high time
(Slave mode)
Continuous
Single Byte
72
TscL
72A
SCK input low time
(Slave mode)
Continuous
Single Byte
73
TdiV2scH, Setup time of SDI data input to SCK edge
TdiV2scL
73A TB2B
Last clock edge of Byte1 to the 1st clock edge
of Byte2
74
TscH2diL, Hold time of SDI data input to SCK edge
TscL2diL
75
TdoR
SDO data output rise time PIC18FXX31
PIC18LFXX31
76
TdoF
SDO data output fall time
78
TscR
SCK output rise time
(Master mode)
PIC18FXX31
PIC18LFXX31
79
TscF
SCK output fall time (Master mode)
80
TscH2doV, SDO data output valid after PIC18FXX31
TscL2doV SCK edge
PIC18LFXX31
Note 1: Requires the use of Parameter # 73A.
2: Only if Parameter # 71A and # 72A are used.
Min
Max Units Conditions
TCY
—
1.25 TCY + 30 —
40
—
1.25 TCY + 30 —
40
—
100
—
1.5 TCY + 40 —
ns
ns
ns (Note 1)
ns
ns (Note 1)
ns
ns ^{(Note 2)}
100
— ns
—
25 ns
—
45 ns
—
25 ns
—
25 ns
—
45 ns
—
25 ns
—
50 ns
—
100 ns
 2003 Microchip Technology Inc.
Preliminary
DS39616B-page 361