PIC18F2331 Datasheet, PDF (176/396 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with nanoWatt Technology, High Performance PWM and A/D

PIC18F2331/2431/4331/4431
FIGURE 16-9:
QEI INPUTS WHEN SAMPLED BY THE FILTER (DIVIDE RATIO = 1:1)
TCY
QEA pin
QEB pin
TQEI = 16TCY⁽¹⁾
QEA input
QEB input
TGD = 3 TCY
Note 1: The module design allows a quadrature frequency of up to FQEI = FCY/16.
FIGURE 16-10:
QEI MODULE RESET TIMING ON PERIOD MATCH
Forward
Reverse
QEA
QEB
count (+/-)
POSCNT⁽¹⁾
+1 +1 +1 +1 +1 +1 +1 +1 +1 +1 +1 +1
-1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
MAXCNT
MAXCNT=1527
IC2QEIF
UP/DOWN
Note 2
position
counter load
Q4⁽³⁾
Q1⁽⁴⁾
Note 6
Note 2
Q4⁽³⁾
Q1⁽⁵⁾
IC3DRIF
Q1⁽⁵⁾
Note 1: POSCNT register is shown in QEI x4 Update mode (POSCNT increments on every rising and every falling edge of
QEA and QEB input signals). Asynchronous external QEA and QEB input are synchronized to TCY clock by the input
sampling FF in the noise filter (see Figure 16-14).
2: When POSCNT = MAXCNT, POSCNT is reset to ‘0’ on the next QEA rising edge. POSCNT is set to MAXCNT when
POSCNT = 0 (when decrementing), which occurs on the next QEA falling edge.
3: IC2QEI is generated on Q4 rising edge.
4: Position counter is loaded with ‘0’ (which is a rollover event in this case) on POSCNT = MAXCNT.
5: Position counter is loaded with MAXCNT value (1527h) on underflow.
6: IC2QEIF must be cleared in software.
DS39616B-page 174
Preliminary
 2003 Microchip Technology Inc.