PIC18F2331 Datasheet, PDF (194/396 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with nanoWatt Technology, High Performance PWM and A/D

PIC18F2331/2431/4331/4431
17.4.4 INTERRUPTS IN DOUBLE UPDATE
MODE
This mode is available in Up/Down Counting mode. In
the Double Update mode (PTMOD<1:0> = 11), an
interrupt event is generated each time the PTMR
register is equal to zero and each time the PTMR
matches with PTPER register. Figure 17-8 shows the
interrupts in Up/Down Counting mode with double
updates.
The Double Update mode provides two additional
functions to the user in Center-Aligned mode.
1. The control loop bandwidth is doubled because
the PWM duty cycles can be updated twice per
period.
2. Asymmetrical center-aligned PWM waveforms
can be generated, which are useful for
minimizing output waveform distortion in certain
motor control applications.
Note:
Do not change PTMOD while PTEN is
active. It will yield unexpected results. To
change PWM Timer mode of operation,
first clear PTEN bit, load PTMOD with
required data and then set PTEN.
FIGURE 17-8:
PWM TIME BASE INTERRUPTS, UP/DOWN COUNTING MODE WITH DOUBLE
UPDATES
A: PRESCALER = 1:1
Case 1: PTMR Counting Upwards
OSC1
PTMR
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
3FDh
3FEh
2
3FFh
3FEh
3FDh
PTDIR bit
PTMR_INT_REQ
1
1
1
1
PTIF bit
Case 2: PTMR Counting Downwards
OSC1
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
PTMR
PTDIR bit
002h
001h
000h
001h
002h
PTMR_INT_REQ
1
1
1
1
PTIF bit
Note 1: Interrupt flag bit PTIF is sampled here (every Q1).
2: PWM Time Base Period register, PTPER, is loaded with the value 3FFh for this example.
DS39616B-page 192
Preliminary
 2003 Microchip Technology Inc.