PIC18F2331 Datasheet, PDF (218/396 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with nanoWatt Technology, High Performance PWM and A/D

PIC18F2331/2431/4331/4431
FIGURE 18-4:
SS
SPI MODE TIMING (SLAVE MODE WITH CKE = 1)
SCK (CKP = 0)
SCK (CKP = 1)
SDO
SDI (SMP = 0)
SSPIF
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
bit7
bit0
TABLE 18-1: REGISTERS ASSOCIATED WITH SPI OPERATION
Name
Bit 7
Bit 6 Bit 5 Bit 4 Bit 3
Bit 2
Bit 1
Bit 0
Value on:
POR,
BOR
Value on
all other
Resets
INTCON
PIR1
PIE1
GIE
PSPIF⁽¹⁾
PSPIE⁽¹⁾
PEIE
ADIF
ADIE
TMR0IE INTE
RCIF TXIF
RCIE TXIE
RBIE
SSPIF
SSPIE
TMR0IF INTF RBIF 0000 000x 0000 000u
CCP1IF TMR2IF TMR1IF 0000 0000 0000 0000
CCP1IE TMR2IE TMR1IE 0000 0000 0000 0000
TRISC PORTC Data Direction Register
1111 1111 1111 1111
SSPBUF Synchronous Serial Port Receive Buffer/Transmit Register
xxxx xxxx uuuu uuuu
SSPCON WCOL SSPOV SSPEN CKP SSPM3 SSPM2 SSPM1 SSPM0 0000 0000 0000 0000
TRISA
—
— PORTA Data Direction Register
--11 1111 --11 1111
SSPSTAT SMP
CKE D/A
P
S
R/W
UA
BF 0000 0000 0000 0000
Legend: x = unknown, u = unchanged, – = unimplemented, read as ‘0’. Shaded cells are not used by the SSP in
SPI mode.
Note 1: Bits PSPIE and PSPIF are reserved on the PIC16F73/76; always maintain these bits clear.
DS39616B-page 216
Preliminary
 2003 Microchip Technology Inc.